• Title/Summary/Keyword: Chip 냉각

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Thermal optimization of the chip arrangement in the PCB channel using genetic algorithm (제네틱 알고리듬을 이용한 PCB 채널 내 칩배열의 열적 최적화)

  • Baek, Chang-In;Lee, Gwan-Su;Kim, U-Seung
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.21 no.3
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    • pp.405-413
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    • 1997
  • A thermal optimization of the chip arrangement in the PCB channel oriented vertically and cooled by natural convection has been studied. The objective of this study is to find the chip arrangement that minimizes the maximum temperature of the entire PCB channel. SIMPLER algorithm is employed in the analysis, and the genetic algorithm is used for the optimization. The results show that the chip with a maximum volumetric heat generation rate has to be located at the bottom of the channel, and chips with relatively high heat generation rates should not be close to each other, and small chip should not be located between the large chips.

Liquid Cooling System Using Planar ECF Pump for Electronic Devices (평면형 ECF 펌프를 이용한 전자기기 액체냉각 시스템)

  • Seo, Woo-Suk;Ham, Young-Bog;Park, Jung-Ho;Yun, So-Nam;Yang, Soon-Young
    • Journal of the Korean Society for Precision Engineering
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    • v.24 no.12
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    • pp.95-103
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    • 2007
  • This paper presents a liquid cooling concept for heat rejection of high power electronic devices existing in notebook computers etc. The design, fabrication, and performance of the planar ECF pump and farced-liquid cooling system are summarized. The electro-conjugate fluid (ECF) is a kind of dielectric and functional fluids, which generates jet flows (ECF-jets) by applying static electric field through a pair of rod-like electrodes. The ECF-jet directly acts on the working fluid, so the proposed planar ECF pump needs no moving part, produces no vibration and noise. The planar ECF pump, consists of a pump housing and electrode substrate, achieves maximum flow rate and output pressure of $5.5\;cm^3/s$ and 7.2 kPa, respectively, at an applied voltage of 2.0 kV. The farced-liquid cooling system, constructed with the planar ECF pump, liquid-cooled heat sink and thermal test chip, removes input power up to 80 W keeping the chip surface temperature below $70\;^{\circ}C$. The experimental results demonstrate that the feasibility of forced-liquid cooling system using ECF is confirmed as an advanced cooling solution on the next-generation high power electronic devices.

A Design of Thin Film Thermoelectric Cooler for Chip-on-Board(COB) Assembly (박막형 열전 소자를 이용한 Chip-on-Board(COB) 냉각 장치의 설계)

  • Yoo, Jung-Ho;Lee, Hyun-Ju;Kim, Nam-Jae;Kim, Shi-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.9
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    • pp.1615-1620
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    • 2010
  • A thin film thermoelectric cooler for COB direct assembly was proposed and the COB cooler structure was modeled by electrical equivalent circuit by using SPICE model of thermoelectric devices. The embedded cooler attached between the die chip and metal plate can offer the possibility of thin film active cooling for the COB direct assembly. We proposed a driving method of TEC by using pulse width modulation technique. The optimum power to the TEC is simulated by using a SPICE model of thermoelectric device and passive components representing thermal resistance and capacitance. The measured and simulated results offer the possibility of thin film active cooling for the COB direct assembly.

Development of Coolant/Waste-oil Separating and Cooling System with Chip Treatment (칩 처리가 포함된 절삭유/폐유 분리 및 냉각 시스템 개발)

  • Kim, Joong-Seon;Lee, Dong-Seop;Wang, Duck-Hyun
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.16 no.3
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    • pp.16-23
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    • 2017
  • For most machine tools, it is necessary to remove chips and coolant oil because it they will continue to be created during the manufacture of workpieces. Existing products that are in use are installed and used as they reflect depending on the characteristics of each device separately. This study proposes a method to remove the security chip as well as developing an integrated system capable of reducing coolant damage. The Leverage AutoCAD and CATIA program was used for 2D and 3D design, shapes were identified by utilizing the KeyShot program, and the load and displacement analysis of the development apparatus was performed utilizing the ANSYS program. After the prototype underwent sufficient design review, the mixed oil separation device had a complete sensor control program using the LabVIEW program. The chip design process for transferring experiments and experiments on the mixed oil cooling device were developed for performance tests of the product. The final product resulted in an increase in space utilization during commercialization, reduced installation costs, and caused social effects such as pulmonary flow reduction, which, through the economic costs, reduces pollution, resulting in various benefits to the industry, such as deceased errors in the workplace decreases.

Reliability Properties of Multilayer Chip NTC Thermistor on Manufacturing Process (제조공정에 따른 적층형 칩 NTC 써미스터 신뢰성 특성)

  • Yoon, Jung-Rag;Yoo, Jang-Young;Lee, Hen-Young;Yeo, Dong-Hun
    • Proceedings of the KIEE Conference
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    • 2005.11a
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    • pp.133-135
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    • 2005
  • Mn-Co-Ni-O계를 적용한 적층 칩 NTC 써미스터의 소성온도 및 냉각 조건에 따른 전기적 특성을 연구하였다. 특히, 소결조건에 따른 저항, B-정수의 경시 변화 특성으로부터 제품의 신뢰성 측면을 검토하였다. 소결온도 및 시간에 의한 영향보다는 냉각속도에 따른 초기 저항 및 B-정수의 변화가 크게 나타났으며 냉각속도를 조절한 시편에서 경시변화율은 1%이하인 특성을 얻을 수 있었다.

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A Numerical Study of NAND Flash Memory on the cooling effect (낸드플래시 메모리의 냉각효과에 관한 수치적 연구)

  • Kim, Ki-Jun;Koo, Kyo-Woog;Lim, Hyo-Jae;Lee, Hyouk
    • 한국전산유체공학회:학술대회논문집
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    • 2011.05a
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    • pp.117-123
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    • 2011
  • The low electric power and high efficiency chips are required because of the appearance of smart phones. Also, high-capacity memory chips are needed. e-MMC(embedded Multi-Media Card) for this is defined by JEDEC(Joint Electron Device Engineering Council). The e-MMC memory for research and development is a memory mulit-chip module of 64GB using 16-multilayers of 4GB NAND-flash memory. And it has simplified the chip by using SIP technique. But mulit-chip module generates high heat by higher integration. According to the result of study, whenever semiconductor chip is about 10 $^{\circ}C$ higher than the design temperature it makes the life of the chip shorten more than 50%. Therefore, it is required that we solve the problem of heating value and make the efficiency of e-MMC improved. In this study, geometry of 16-multilayered structure is compared the temperature distribution of four different geometries along the numerical analysis. As a result, it is con finned that a multilayer structure of stair type is more efficient than a multilayer structure of vertical type because a multi-layer structure of stair type is about 9 $^{\circ}C$ lower than a multilayer structure of vertical type.

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Chip-Tool Friction and Shear Characteristics of Cold Drawn Free Machining Steels in Turning (냉각인발된 쾌삭강의 외경선삭시 칩-공구 마찰 및 전단 특성)

  • Lee, Young-Moon;Cho, Sam-Kyu;Choi, Soo-Joon;Song, Tae-Seong;Park, Tae-Joon
    • Journal of the Korean Society for Precision Engineering
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    • v.16 no.12
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    • pp.198-203
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    • 1999
  • In this study, chip-tool friction and shear characteristics of cold drawn free machining steels in turning were assessed. To do this, a newly developed equivalent oblique cutting model was adopted. And for comparison with those of free machining steels, chip-tool friction and shear characteristics of conventional carbon steels were also investigated. The Pb-S free machining steel shows superior machinability to others. In case of the Bi-S free machining steel, the shear stress and the specific friction energy are relatively lower than those of conventional carbon steels, but its shear strain is relatively high, so it does not show any remarkable improvement of machinability.

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Three-dimensional natural convection cooling of the electronic device with the effects of convective heat dissipation and vents (전자장비에서 벽면의 대류열방출 및 통기구의 효과를 고려한 3차원 자연대류 냉각)

  • ;;;Baek, Chang-In;Lim, Kwang-Ok
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.19 no.11
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    • pp.3072-3083
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    • 1995
  • The numerical simulation on the three-dimensional natural convection heat transfer in the enclosure with heat generating chip is performed, and the effects of convective heat loss and vents are also examined. The effects of the Rayleigh number and outer Nusselt number (Nu$_{0}$) on the maximum chip temperature and the fractions of heat loss from the hot surfaces are investigated. The results show that conduction through the substrate is dominant in heat dissipation. With the increase of Rayleigh number, heat dissipation through the chip surfaces increases and heat loss through the substrate decreases. Maximum dimensionless temperature with vents is found to decrease about 40% compared to the one without vents at Nu$_{0}$=0.l. It is also shown that effects of size and location of the vents are negligible.ble.

Jet Impingement Heat Transfer on a Cylindrical Pedestal Encountered in Chip Cooling (충돌제트를 이용한 Pedestal 형상의 칩 냉각연구)

  • Lee, Dae-Hee;Lee, Joon-Sik;Chung, Young-Suk;Chung, Seung-Hoon
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.27 no.1
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    • pp.1-8
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    • 2003
  • The heat transfer and flow measurements on a cylindrical pedestal mounted on a flat surface with a turbulent impinging jet were made. The experiments were made for the jet Reynolds number of Re = 23,000, the dimensionless nozzle-to-surface distance of L/d = 2~10, the dimensionless pedestal height of H/D = 0~1.5. Measurements of the surface temperature and the Nusselt number distributions on the plate surface were made using liquid crystal and shroud-transient technique. Flow measurements involve smoke flow visualization and the wall pressure coefficient. The results show that the wall pressure coefficient sharply decreases along the upper surface of the pedestal. However, the pressure increases when the fluid escapes from the pedestal and then collides on the plate surface. The secondary maxima in the Nusselt numbers occur in the region of 1.0 $\leq$ r/d $\leq$ 1.9. Their values for the case of H/D = 0.5 are maximum 80% higher than those for other cases. The formation of the secondary maxima may be attributed to the reattachment of flow on the plate surface which was separated at the edge of the pedestal.

A study on the application of heat pipe to the cooling of ATM switching system (전자교환시스템 냉각을 위한 히트파이프 적용 연구)

  • Kim, W.T.;Lee, Y.P.;Yoon, S.Y.
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.9 no.4
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    • pp.497-503
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    • 1997
  • In the present study, the cooling package using the heat pipe has been developed to improve the thermal performance in the point of cooling characteristics of the electronic chip placed to the subrack being readily assembled and disassembled in ATM switching system. As the preliminary experiments, the cooling performances between a conventional way using a cooling fin and a proposed method applying the heat pipe are compared and analyzed. The cooling performance at a simulated electronic component packaging a heat pipe module is approximately achieved up to $5.0W/cm^2$ heat flux and the allowable temperature at the heated chip is sustained in the range within $70^{\circ}C$. From the results, it is confirmed that temperature oscillations are also settled by inserted wick in the evaporator section. From the user's viewpoint, the method to assemble and disassemble the heat pipe easily has been devised.

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