• Transactions on Electrical and Electronic Materials
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• v.15 no.3
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• pp.139-143
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• 2014

In this paper, an integrated low-voltage control circuit is introduced for a charge pump DC-DC boost converter. By exploiting the advantage of the integration of the feedback control circuit within CMOS technology, the charge pump boost converter offers a low-current operation with small ripple voltage. The error amplifier, comparator, and oscillator in the control circuit are designed with the supply voltage of 3.3 V and the operating frequency of 1.6~5.5 MHz. The charge pump converter with the 4 or 8 pump stages is measured in simulation. The test in the $0.35{\mu}m$ CMOS process shows that the load current and ripple ratio are controlled under 1 mA and 2% respectively. The output-voltage is obtained from 4.8 ~ 8.5 V with the supply voltage of 3.3 V.

• Proceedings of the KIEE Conference
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• 1998.07e
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• pp.1687-1689
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• 1998

In this work, the behaviours of conducting wire type particles within the coaxial electrode gap energized with high ac voltage have been systematically investigated using charge simulation method. For this, spheroidal charge is adopted as a image charge for the CSM analysis in order to calculate the acquired charge of the particles which are erected on the surface of the outer electrode. For this purpose, the effects of the lengths and diameters of Cu, Al particles in gas insulated system have been studied by a numerical computation and particle lifting voltage, lifting field, breakdown voltage, acquired charge and travelling distance have been considered. From this, we understand that the particle behaviours have different characteristics according to the particle lengths and diameters. And a possible countermeasure, based on the proposed simulation, has been provided with a view to estimating the flashover voltage of $SF_6$ gas under the 1 atm.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.5
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• pp.521-526
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• 1999

It was investigated that traps were generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The charge state of the traps can easily be changed by application of low voltage after the stress high voltage. It determined to the relative traps locations inside the oxides ranges from 113.4$\AA$to 814$\AA$ with capacitor areas of $10^{-3}{$\mid$textrm}{cm}^2$. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The oxide charge state of traps generated by the stress high voltage contain either a positive or a negative charge.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.9 no.4
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• pp.419-427
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• 2016

In this paper, a 64b small-area MTP memory IP is designed. A VPPL (=VPP/3) regulator and a VNN (=VNN/3) charge pump are removed since the inhibit voltages of an MTP memory cell are all 0V instead of the conventional voltages of VPP/3 and VNN/3. Also, a VPP charge pump is removed since the VPP program voltage is supplied from an external pad. Furthermore, a VNN charge pump is designed to provide its voltage of -VPP as a one-stage negative charge pump using the VPP voltage. The layout size of the designed 64b MTP memory IP with MagnaChip's $0.18{\mu}m$ BCD process is $377.585{\mu}m{\times}328.265{\mu}m$ (=0.124mm2). Its DC-DC converter related layout size is 76.4 percent smaller than its conventional counterpart.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.283-287
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• 2002

To remedy both the degradation and saturation of the output voltages in the modified Dickson pump. a new multi-stage charge pump circuit is presented in this paper. Here using PMOS charge-transfer switches instead of NMOS ones eliminates the necessity of diode-configured output stage in the modified-Dickson pump, achieving the improved voltage pumping gain and its output voltages proportional to the stage numbers. Measurement indicates that VOUT/3VDD of this new pump circuit with two stages reaches to a value as high as 0.94 even with low VDD=1.0 V, strongly addressing that this scheme is very favorable at low-voltage memory applications.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.381-383
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• 2007

Charge-pump high voltage inverter for Plasma backlight with CIM(Current Injection Method) is proposed in this paper. Adoption of ERC is a new attempt in high voltage inverter so that it is not only energy recovery but also improvement of discharge stability and system unstability which is interrupted by noise. Using a charge-pump technique enables low voltage switches to be usable, the cost can be reduce. CIM is adopted to achieve high speed energy recovery in proposed circuit. Operations of the proposed circuit are analyzed for each mode. The proposed circuit is verified to be applicable on a 32 inch plasma backlight panel by experimental results.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.776-780
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• 2007

In this paper, the charge pump circuit of a VPP generator for a low voltage DRAM is newly proposed. The proposed charge pump is a 2-stage cross coupled charge pump circuit. The charge transfer efficiency is improved, and Distributed Clock Inverter is located in each charge pump stage to reduce clock period so that the pumping current is increased. In addition, the precharge circuit is located at Gate node of charge transfer transistor to solve the problem which is that the Gate node is maintained high voltage because the boosted charge can't discharge, so device reliability is decreased. The simulation result is that pumping current, pumping efficiency and power efficiency is improved. The layout of the proposed VPP generator is designed using $0.18{\mu}m$ Triple-Well process.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1209-1217
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• 2016

This paper presents a novel charge pump scheme that combines the advantages of Fibonacci and Dickson charge pumps to obtain 30 V voltage for display driver integrated circuit application. This design only requires four external capacitors, which is suitable for a small-package application, such as smart card displays. High-amplitude (<6.6 V) clocks are produced to enhance the gate drive of a Dickson charge pump and improve the system's current drivability by using a voltage-doubler charge pump with a pulse skip regulator. This regulation engages many middle-voltage devices, and approximately 30% of chip size is saved. Further optimization of flying capacitors tends to decrease the total chip size by 2.1%. A precise and simple model for a one-stage Fibonacci charge pump with current load is also proposed for further efficiency optimization. In a practical design, its voltage error is within 0.12% for 1 mA of current load, and it maintains a 2.83% error even for 10 mA of current load. This charge pump is fabricated through a 0.11 μm 1.5 V/6 V/32 V process, and two regulators, namely, a pulse skip one and a linear one, are operated to maintain the output of the charge pump at 30 V. The performances of the two regulators in terms of ripple, efficiency, line regulation, and load regulation are investigated.

• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.6
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• pp.292-296
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• 2002

A new sustain driving method for the AC PDP is presented. In this driving method, the voltage source is connected to a storage capacitor, this storage capacitor charges an intermediate capacitor through LC resonance, and the panel is charged from the intermediate capacitor indirectly. In this way, the current flowing into the AC PDP when the sustain discharge occurs is reduced because the current is indirectly supplied from a capacitor, a limited source of charge. Thus, the input power to the output luminance efficiency is improved. Since the voltage supplied to the storage capacitor is doubled through LC resonance, this method call drive an AC PDP with a voltage source of about half of the voltage necessary in the conventional driving methods. The experiments showed that this charge-controlled driving method could drive ail AC PDP with a voltage source of as low as 107V. Using a panel of the conventional structure, luminous efficiency of 1.28 lm/W was achieved.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.1
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• pp.34-39
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• 2015

In this study, the characteristics of partial discharge was measured for the four core silicone cable (0.6/1.0 kV, $1.0SQ{\times}4C$) with insulated part of 15 cm and conductor of 1cm. The following results have been confirmed as a result of this study. When the first line of cable is connected to the positive electrode and the second, third line of cable is connected to the negative electrode, it found that the inception voltage and extinction voltage decreased with increasing the line of negative electrode, and the partial discharge charge quantity(Q) increases, while the number of discharge occurrence has decreased. The inception voltage and extinction voltage of partial discharge has decreased with increasing the degradation rate in the 33%, 67%, 100%. Also, it confirmed that the partial discharge charge quantity(Q) and the number of discharge occurrence has decreased.