• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2012.05a
• /
• pp.693-695
• /
• 2012

This paper have presented the breakdown voltage for double gate(DG) MOSFET. The analytical solution of Poisson's equation and Fulop's breakdown condition have been used to analyze for breakdown voltage. The double gate(DG) MOSFET as the device to be able to use until nano scale has the adventage to reduce the short channel effects. But we need the study for the breakdown voltage of DGMOSFET since the decrease of the breakdown voltage is unavoidable. To approximate with experimental values, we have used the Gaussian function as charge distribution for Poisson's equation, and the change of breakdown voltage has been observed for device geometry. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. As a result to observe the breakdown voltage, the smaller channel length and the higher doping concentration become, the smaller the breakdown voltage becomes. Also we have observed the change od the breakdown voltage for gate oxide thickness and channel thickness.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.17 no.2
• /
• pp.230-238
• /
• 2017

We have proposed an InGaAs-based gate-all-around (GAA) tunneling field-effect transistor (TFET) with a stacked dual-metal gate (DMG). The electrical performances of the proposed TFET are evaluated through technology computer-aided design (TCAD) simulations. The simulation results show that the proposed TFET demonstrates improved DC performances including high on-state current ($I_{on}$) and steep subthreshold swing (S), in comparison with a single-metal gate (SMG) TFET with higher gate metal workfunction, as it has a thinner source-channel tunneling barrier width by low workfunction of source-side channel gate. The effects of the gate workfunction on $I_{on}$, the off-state current ($I_{off}$), and S in the DMG-TFETs are examined. The DMG-TFETs with PNPN structure demonstrate outstanding DC performances and RF characteristics with a higher n-type doping concentration in the $In_{0.8}Ga_{0.2}As$ source-side channel region.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.11a
• /
• pp.94-94
• /
• 2008

We have performed simulation for Junction Field Effect Transistor(JFET) using Silvco to improve its electrical properties. The device structure and process conditions of Si-control JFET(Si-JFET) were determined to set its cut off voltage and drain current(at Vg=0V) to -0.5V and $300{\mu}A$, respectively. From electrical property obtained at various implantation energy, dose, and drive-in conditions of p-gate doping, we found that the drive in time of p-type gate was the most determinant factor due to severe diffusion. Therefore we newly designed SiGe-JFET, in which SiGe layer is to epitaxial layers placed above and underneath of the Si-channel. The presence of SiGe layer lessen the p-type dopants (Boron) into the n-type Si channel the phenomenon would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer will be discussed in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.11
• /
• pp.49-54
• /
• 1990

In this paper, a simple model is presented for the gate-voltage dependence of the parasitic resistance in MOSFETs with the lightly-doped drain (LDD) structure. At the LDD region located under the gate electrode, an accumulation layer is formed due to the gate voltage. The parasitic resistance of the source side LDD in the channel is treated as a parallel combination of the resistance of the accumulation layer and that of the bulk LDD, which is approximated as a spreading resistance from the end of the channel inversion layer to the ${n^+}$/LDD junction boundary. Also the effects of doping gradients at the junction are discussed. As result of the model, the LDD resistance decreases with increasing the gate voltage at the linear regime, and increase quasi-linearly with the gate voltage at the saturation regime, considering th velocity saturation both in the channel and in the LDD region. The results are in good agreement with experimental data reported by others.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2011.10a
• /
• pp.878-881
• /
• 2011

In this paper, drain induced barrier lowering(DIBL) has been analyzed as one of short channel effects occurred in double gate(DG) MOSFET to be next-generation devices. Since Gaussian function been used as carrier distribution for solving Poisson's equation to obtain analytical solution of potential distribution, we expect our results using this model agree with experimental results. DIBL has been investigated according to projected range and standard projected deviation as variables of Gaussian function, and channel thickness and channel doping intensity as device parameter. Since the validity of this analytical potential distribution model derived from Poisson's equation has already been proved in previous papers, DIBL has been analyzed using this model.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.19 no.1
• /
• pp.156-162
• /
• 2015

This paper has analyzed how conduction path and electron concentration for the device parameters such as oxide thickness, channel doping, and top and bottom gate voltage influence on subthreshold swing of asymmetric double gate MOSFET. Compared with symmetric and asymmetric double gate MOSFET, asymmetric double gate MOSFET has the advantage that the factors to be able to control the short channel effects increase since top and bottom gate oxide thickness and voltages can be set differently. Therefore the conduction path and electron concentration for top and bottom gate oxide thickness and voltages are investigated, and it is found the optimum conditions that the degradation of subthreshold swing, severe short channel effects, can reduce. To obtain the analytical subthreshold swing, the analytical potential distribution is derived from Possion's equation. As a result, conduction path and electron concentration are greatly changed for device parameters, and subthreshold swing is influenced by conduction path and electron concentration of top and bottom.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.10
• /
• pp.14-22
• /
• 2010

The source/channel/drain regions are formed by ion implantation with different dopant types of $n^+/p^{(+)}/n^+$ in the fabrication of the conventional n-type metal-oxide-semiconductor field effect transistor(NMOSFET). In implementing the ultra-small devices with channel length of sub-30 nm, in order to achieve the designed effective channel length accurately, low thermal budget should be considered in the fabrication processes for minimizing the lateral diffusion of dopants although the implanted ions should be activated as completely as possible for higher on-current level. Junctionless (JL) MOSFETs fully capable of the the conventional NMOSFET operations without p-type channel for enlarging the process margin are under researches. In this paper, the optimum design of the JL MOSFET based on silicon nanowire (SNW) structure is carried out by 3-D device simulation and the basic radio frequency (RF) characteristics such as conductance, maximum oscillation frequency($f_{max}$), current gain cut-off frequency($f_T$) for the optimized device. The channel length was 30 run and the design variables were the channel doping concentration and SNW radius. For the optimally designed JL SNW NMOSFET, $f_T$ and $f_{max}$ high as 367.5 GHz and 602.5 GHz could be obtained, respectively, at the operating bias condition $V_{GS}$ = $V_{DS}$ = 1.0 V).

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.02a
• /
• pp.669-669
• /
• 2013

Hierarchical N doped TiO2 nanostructured catalyst with micro, meso and macro porosity have been synthesized by a facile self-formation route using ammonia and titanium isopropoxide precursor. The samples were calcined in different calcination temperature ranging from $300^{\circ}C$ to $800^{\circ}C$ at slow heating rate ($5^{\circ}C$/min) and designated as NHPT-300 to NHPT-800. $TiO_2$ nanostructured catalyst have been characterized by physico-chemical and spectroscopy methods to explore the structural, electronic and optical properties. UV-Vis diffuse reflectance spectra confirmed the red shift and band gap narrowing due to the doping of N species in TiO2 nanoporous catalyst. Hierarchical macro porosity with fibrous channel patterning was observed (confirmed from FESEM) and well preserved even after calcination at $800^{\circ}C$, indicating the thermal stability. BET results showed that micro and mesoporosity was lost after $500^{\circ}C$ calcination. The photocatalytic activity has been evaluated for methanol oxidation to formaldehyde in visible light. The enhanced photocatalytic activity is attributed to combined synergetic effect of N doping for visible light absorption, micro and mesoporosity for increase of effective surface area and light harvestation, and hierarchical macroporous fibrous structure for multiple reflection and effective charge transfer.

• Nuclear Engineering and Technology
• /
• v.53 no.7
• /
• pp.2364-2370
• /
• 2021

The ⁿMCP (Neutron sensitive microchannel plate) combined with advanced readout electronics is widely used in energy selective neutron imaging because of its good spatial and timing resolution. Neutron detection efficiency is a crucial parameter for the ⁿMCP. In this paper, a mathematical model based on the oblique cylindrical channel and elliptical pore was established to calculate the neutron absorption probability, the escape probability of charged particles and overall detection efficiency of ⁿMCP and analyze the effects of neutron incident position, pore diameter, wall thickness and bias angle. It was shown that when the doping concentration of the ⁿMCP was 10 mol%, the thickness of ⁿMCP was 0.6 mm, the detection efficiency could reach maximum value, about 24% for thermal neutrons if the pore diameter was 6 ㎛, the wall thickness was 2 ㎛ and the bias angle was 3 or 6°. The calculated results are of great significance for evaluating the detection efficiency of the ⁿMCP. In a subsequent companion paper, the mathematical model would be extended to the case of the spatial resolution and detection efficiency optimization of the coating ⁿMCP.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2011.05a
• /
• pp.664-667
• /
• 2011

In this paper, threshold voltage characteristics have been analyzed as one of short channel effects occurred in double gate(DG)MOSFET to be next-generation devices. The Gaussian function to be nearly experimental distribution has been used as carrier distribution to solve Poisson's equation, and threshold voltage has been investigated according to projected range and standard projected deviation, variables of Gaussian function. The analytical potential distribution model has been derived from Poisson's equation, and threshold voltage has been obtained from this model. Since threshold voltage has been defined as gate voltage when surface potential is twice of Fermi potential, threshold voltage has been derived from analytical model of surface potential. Those results of this potential model are compared with those of numerical simulation to verify this model. As a result, since potential model presented in this paper is good agreement with numerical model, the threshold voltage characteristics have been considered according to the doping profile of DGMOSFET.