• Title/Summary/Keyword: Capacitor design method

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Characteristics Analysis of ZVS-HB Type High Frequency Resonant Inverter According to the Variable Capacitance of the DC Voltage Source Separation Capacitor (직류 전원 분할용 커패시터의 용량 변화에 따른 ZVS-HB형 고주파 공진 인버터의 특성해석)

  • Mun, Chang-Su;Kim, Jong-Hae;Kim, Dong-Hui;O, Seung-Hun;Sim, Gwang-Yeol;Min, Byeong-Jae
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.49 no.5
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    • pp.352-357
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    • 2000
  • This paper presents about an example of circuit design and characteristics of inverter according to the variable capacitance of the DC voltage source separation capacitor used in ZVS-HB type high frequency resonant inverter. The soft switching technology known as ZVS is used to reduce turn off loss at switching. In the event the capacitance of the DC voltage source separation capacitor is varied, the analysis of inverter circuit has generally described by using normalized parameter and operating characteristics have been evaluated in terms of switching frequency and parameters. According to the calculated characteristics value, a method of the circuit designs and operating characteristic of the inverter is also presented in this paper. In addition, this paper proves the validity of theoretical analysis through the experiment. This proposed inverter shows that it can be practically used in future as power source system for the lighting equipment of discharge lamp, DC-DC converter etc.

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Design of High-Sensitivity Compact Resonator using Interdigital-Capacitor Structure for Chipless RFID Applications (인터디지털-커패시터 구조를 이용한 Chipless RFID용 고감도 소형 공진기 설계)

  • Yeo, Junho;Lee, Jong-Ig
    • Journal of Advanced Navigation Technology
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    • v.25 no.1
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    • pp.90-95
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    • 2021
  • In this paper, the design method for a high-sensitivity compact resonator for chipless RFID tags is proposed. Proposed high-sensitivity compact resonator uses an interdigital-capacitor structure instead of a capacitor-shaped strip structure in a conventional ELC resonator. The length of the electrode plate of the IDC structure is longer than that of the conventional capacitor-shaped structure, resulting in a larger equivalent capacitance of the resonator. This can lower the resonant peak frequency of the RCS characteristic. Two resonators with the same length of the square loop and the width of the strip are fabricated on an RF-301 substrate with a thickness of 0.8 mm. The experiment results show that the resonant peak frequency and value of the bistatic RCS for the ELC resonator were 4.305 GHz and -30.39 dBsm, whereas those of the proposed IDC resonator were 3.295 GHz and -36.91 dBsm. Therefore, the size of the resonator is reduced by 23.5% based on the measured resonant peak frequency of the RCS characteristic.

Design of Triple Loop Current Control for Auxiliary Power Unit of Fuel Cell Train having Grid Connected Inverter Function (계통 연계 기능을 갖는 연료전지 철도차량 보조전원장치의 삼중 루프 전류 제어기 설계)

  • Kwon, Il-Seob;Baek, Seung-Woo;Kim, Hag-Wone;Cho, Kwan-Yual
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.4
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    • pp.293-302
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    • 2020
  • This study proposes a triple-loop current control method for the auxiliary power unit of fuel cell trains. The auxiliary power unit of fuel cell trains has a grid-connected function when power is supplied to the utility grid. Moreover, the auxiliary power unit of trains has a 1500 V DC link voltage; thus, PWM frequency cannot be increased to a high frequency. Owing to this low PWM frequency condition, creating a triple-loop design is difficult. In this study, a triple-loop controller is developed for a capacitor voltage controller in standalone mode that operates as an auxiliary power supply for trains and for a grid current controller in grid control mode with an inner capacitor voltage controller. The voltage controller employs an inductor current controller inner loop. To overcome low PWM frequency, a design method for the bandwidth of the capacitor voltage controller considering the bandwidth of the inner inductor current controller is described. The effectiveness of the proposed method is proven using PSIM simulation.

Design of Bootstrap Power Supply for Half-Bridge Circuits using Snubber Energy Regeneration

  • Chung, Se-Kyo;Lim, Jung-Gyu
    • Journal of Power Electronics
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    • v.7 no.4
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    • pp.294-300
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    • 2007
  • This paper deals with a design of a bootstrap power supply using snubber energy regeneration, which is used to power a high-side gate driver of a half-bridge circuit. In the proposed circuit, the energy stored in the low-side snubber capacitor is transferred to the high-side bootstrap capacitor without any magnetic components. Thus, the power dissipation in the RCD snubber can be effectively reduced. The operation principle and design method of the proposed circuit are presented. The experimental results are also provided to show the validity of the proposed circuit.

Output Filter Design of Voltage Source Inverter for CVCF System (CVCF용 VSI의 출력필터 설계)

  • 김재식;최재호
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.287-290
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    • 1999
  • This paper describes an optimal design method of VSI output filter for CVCF system. The cost function is used for design, and all parameters are described in p.u(per unit) so that can be adapted to the change of CVCF rating. The capacitor current feedback scheme is proposed to control the damping ratio of the filter plant to meet the system more stable. This means that the LC resonance can be suppressed well in transient condition and can use the same control gains under the change of system capacity. The validity of the proposed method is well verified with the theoretical analysis and simulation results.

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On-chip ESD protection design by using short-circuited stub for RF applications (Short-Circuited Stub를 이용한 RF회로에서의 정전기 방지)

  • 박창근;염기수
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.05a
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    • pp.288-292
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    • 2002
  • We propose the new type of on-chip ESD protection method for RF applications. By using the properties of RF circuits, we can use the short-circuited stub as ESD protection device in front of the DC blocking capacitor Specially, we can use short-circuited stub as the portion of the matching circuit so to reduce the and various parameters of the transmission line. This new type ESD protection method is very different from the conventional ESD protection method. With the new type ESD protection method, we remove the parasitic capacitance of ESD protection device which degrade the performance of core circuit.

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Design of the gate drive circuit for floating MOSFET using the pulse transformer (펄스 변압기를 이용한 비접지 MOSFET의 게이트 구동 회로 설계)

  • Park, Chong-Yeun;Lee, Bong-Jin
    • Journal of Industrial Technology
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    • v.27 no.B
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    • pp.15-20
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    • 2007
  • This paper presents the new design method for the gate driver circuit of the floating MOSFET by using the pulse transformer. Each parameters of the proposed circuit are delivered by the numerical calculation method. By considering inner characteristics of MOSFET, the gate driver makes to increase the efficiency of the power conversion and decrease operating heat. Computer simulations and to experimental results for a Buck Converter are presented in order to validate the proposed method.

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A Study on Capacitor-Driven Induction Coil Guns (커패시터로 구동되는 유도형 전자(電磁) 가속장치의 연구)

  • Jang, S.M.;Kim, S.W.;Jung, H.K.;Hahn, S.Y.
    • Proceedings of the KIEE Conference
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    • 1991.07a
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    • pp.143-146
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    • 1991
  • This paper describes the analysis of a capacitor-driven induction coil-gun employing an equivalent circuit. The system differerntial equations are solved by using Runge-Kutta method. The velocity characteristics of projectile and current building in barrel ciols are studied. From the results, it is shown the optimal capacitance of capacitors, charging voltage and initial position of the projectile can be determined. These results will be used as the basis data for the design of capacitor driven coil-guns.

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Design of a Step-Down DC-DC converter with On-chip Capacitor multiplyed Compensation circuit (온칩된 커패시터 채배기법 적용 보상회로를 갖는 DC to DC 벅 변환기 설계)

  • Park, Seung-Chan;Lim, Dong-Kyun;Yoon, Kwang-Sub
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.537-538
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    • 2008
  • A step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in 0.18um CMOS standard process. In an effort to improve low load efficiency, this paper proposes the PFM (Pulse Frequency modulation) voltage mode 1MHz switching frequency step-down DC-DC converter with on-chip compensation. Capacitor multiplier method can minimize error amplifier compensation block size by 20%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87% for the output voltage of 1.8V (input voltage : 3.3V), maximum load current 500mA, and 0.14% output ripple voltage. The total core chip area is $mm^2$.

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A Study on the Service Reliability and Power Quality Improvement Using Hybrid Type Capacitor Bank (하이브리드 타입 커패시터 뱅크를 이용한 공급신뢰도 및 전력품질 개선 방안 연구)

  • Lee, Hansang;Yoon, Dong-Hee
    • Journal of IKEEE
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    • v.18 no.3
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    • pp.313-319
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    • 2014
  • The objectives of power system operations are to preserve system stability and reliability as well as to supply proper electric power. For an activation of these objectives, voltage and reactive power should be considered. There are a number of types about reactive power sources, and an insertion of shunt capacitor banks are one of the method to support bus voltage adjacent. This paper includes the design procedure to determine the hybrid type capacitor bank configurations on power system to improve stability and reliability. This procedure includes the capacitor bank capacity calculation, reactor type selection, and reactor capacity calculation. The total capacity calculation of capacitor bank is based on the reactive power margin which is calculated through system studies such as, contingency analysis and Q-V analysis. In the second step, the reactor type and its capacity can be determined through the harmonic analysis. This paper shows that the harmonics are decreased by the proposed hybrid type capacitor bank, especially 5th and 7th harmonics.