• 제목/요약/키워드: Capacitor conditions

검색결과 234건 처리시간 0.027초

ZnO를 사용한 MOS 커패시터의 제작 조건에 따른 특성 변화 (Property Variations of ZnO-based MOS Capacitor with Preparation Conditions)

  • 남형진
    • 반도체디스플레이기술학회지
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    • 제9권3호
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    • pp.75-78
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    • 2010
  • In this study we investigated the electrical properties of ZnO-based MOS capacitor with $HfO_2$ as the gate dielectric. MIM capacitor, which uses either $HfO_2$ or $Al_2O_3$ as the dielectric layer, is also studied to understand the dependency of the dielectrics on the preparation conditions. It was found that thinner $HfO_2$ films yield better electrical properties, namely lower leakage current and higher breakdown electric field. These properties were observed to deteriorate when subsequently annealed. Capacitance in the depletion region of MOS capacitor was found to increase with UV ozone treatment time up to 60min. However, when the treatment time was extended to 120min, the trend is reversed. The 'threshold voltage' was also observed to positively shift with UV ozone treatment time up to 60min. The shift apparently saturated for longer treatment.

고밀도 DRAM 캐패시터에서 HSG-Si형성의 공정최적화에 관한 연구 (A Study on the Optimum Process Conditions of Hemispherical trained Silicon formation for High Density DRAM'S Capacitor)

  • 정양희;강성준
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2001년도 추계종합학술대회
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    • pp.634-639
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    • 2001
  • In this paper, we discuss optimum process conditions of Hemispherical Grained Silicon formation for high density DRAM'S capacitor. In optimum process renditions, the phosphorous concentration, storage polysilicon deposition temperature and thickness of hemispherical grain silicon are in the range of 3.0-4.0E19atoms/㎤, 53$0^{\circ}C$ and 40(equation omitted), respectively. in the 64M bit DRAM capacitor using optimum process conditions, limit thickness of nitride is about 65(equation omitted). The results obtained in this study are applicable to process control and HSG-Si formation for high reliability and high density DRAM's capacitor.

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Nonlinear Control of Three-phase Split-Capacitor Inverters under Unbalanced and Nonlinear Load Conditions

  • Nguyen, Qui Tu Vo;Lee, Dong-Choon
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2012년도 추계학술대회 논문집
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    • pp.52-53
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    • 2012
  • This paper presents a new control scheme for a three-phase split DC-link capacitor inverter as an AC power supplies. The proposed control method can maintain the balanced sinusoidal output voltage under unbalanced and nonlinear load conditions. The validity of the control method has been verified by simulation results.

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태양광 시스템에 적용한 배터리 커패시터의 전기적 특성에 관한 연구 (A Study on the Electrical Characteristics of Battery Capacitor Applied to Photovoltaic Power System)

  • 맹주철;윤중락
    • 전기학회논문지
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    • 제66권12호
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    • pp.1740-1744
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    • 2017
  • This paper describes the preparation and characteristics of a battery capacitor and module for solar power system. A cylindrical 30,000F battery capacitor ($60{\times}138mm$) was assembled by using the $LTO(Li_4Ti_5O_{12})$ electrode as an anode and $NMC(LiNiMnCoO_2)-LCO(LiCoO_2)$ as a cathode. The battery capacitor has reduced energy density and power density under high CC(constant current) and CP(constant power) conditions. Battery capacitor module (16V, 11Ah) was fabricated using an asymmetric hybrid capacitor with a capacitance of 30,000F. In order to determine the characteristics of the battery capacitor Module for solar power system, battery capacitor cells were connected in series with active balancing circuit. As a result of measuring the 100w LED lamp, it was discharged at the voltage of 15V~10V, and the compensation time at discharge was measured to be about 4979s. Experimental results show that it can be applied to applications related to solar power system by applying battery capacitor module.

콘덴서 양부판정용 충·방전 시험기 설계와 구현에 관한 연구 (A Study on the Design and Implementation of Charge and Discharge-Tester for Capacitors)

  • 문종현;김금수;박재욱;서철식;김동희
    • 조명전기설비학회논문지
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    • 제24권9호
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    • pp.71-78
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    • 2010
  • The existing capacitor-testers could only judge the condition of capacitor is normal or abnormal, and could not inform the real characteristics of the tested capacitors. In this research, it has designed the real-time observation of the new capacitor in charge and discharge tester for showing capacitor conditions and classification through wide voltages by regular cycle-tests. And proposed the quality classification algorithm of capacitors for more simple and practical, and approve them by test.

적층형 필름 Chip Capacitor 개발 (A Study on the Stacked type Film Chip Capacitor)

  • 송호근;박상식;연강흠;김성호
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1991년도 추계학술대회 논문집
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    • pp.73-78
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    • 1991
  • In this study of stacked type film chip capacitor, the important parameters are heat-treated temperature, pressure and time. We measured the temperature dependence of dielectric properties and dissipation factor and the frequency dependence of dielectric properties, dissipation factor, ESR(Equivalent Series Resistance) and impedance in stacked type film capacitor. As a result, the best conditions of heat-treated temperature, pressure and time were proved to be 130$^{\circ}C$, 10kg/$\textrm{cm}^2$ and 3hrs, respectively.

Active Voltage-balancing Control Methods for the Floating Capacitors and DC-link Capacitors of Five-level Active Neutral-Point-Clamped Converter

  • Li, Junjie;Jiang, Jianguo
    • Journal of Power Electronics
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    • 제17권3호
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    • pp.653-663
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    • 2017
  • Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

DC Injection Control for Grid-Connected Single-Phase Inverters Based on Virtual Capacitor

  • Wang, Wei;Wang, Ping;Bei, Taizhou;Cai, Mengmeng
    • Journal of Power Electronics
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    • 제15권5호
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    • pp.1338-1347
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    • 2015
  • DC injection is a critical issue in transformerless grid-connected inverters. DC injection control based on virtual capacitor has the advantages of low cost, low loss, high accuracy and easy implementation. In this paper, the principle of DC injection control based on virtual capacitor was analyzed. In addition, the applicable conditions, working process, steady state error and advantages were also discussed in detail. The design of the control parameters based on virtual capacitor was proposed in a grid-connected inverter with LCL filter. The robustness of the control parameters was also discussed. Simulation and experimental results verify the validity of the analysis and demonstrate that this research has a certain value in engineering applications.

Conversion of a Constant Phase Element to an Equivalent Capacitor

  • Chang, Byoung-Yong
    • Journal of Electrochemical Science and Technology
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    • 제11권3호
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    • pp.318-321
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    • 2020
  • Here I present a formula which converts a constant phase element (CPE) to its equivalent capacitor. Electrochemical impedance spectroscopy is capable of resolving a complex electrochemical processes into its faradaic and non-faradaic elements, and the non-faradaic process is frequently described as a CPE in place of a capacitor due to the non-ideality. Being described as a capacitor, the non-faradaic element provides information by its capacitance, but a CPE cannot provide a physical meaning. In order to solve the problem, the CPE has been dealt with as an equivalent capacitor of which the capacitance provides practical information. Succeeding the two methods previously suggested, a new conversion method is suggested in this report. While the previous ones manipulate only the CPE, the new method takes both the CPE and its related resistor into account for conversion. By comparing the results obtained by the three methods, we learn that the results are nearly the same within tolerable ranges, and conclude that any of the method choices is acceptable depending on the conditions of the system of interest.

Analysis the Reliability of Multilayer Ceramic Capacitor with inner Ni Electrode under highly Accelerated Life Test Conditions

  • Yoon, Jung-Rag;Lee, Kyung-Min;Lee, Serk-Won
    • Transactions on Electrical and Electronic Materials
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    • 제10권1호
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    • pp.5-8
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    • 2009
  • The reliability of multilayer ceramic capacitor with active thin dielectric layer was investigated by highly accelerated life test at various stress condition. The distribution of multilayer ceramic capacitor failure times is plotted as a function of time from Weibull distribution function. According to the test result, voltage acceleration factor is obtained from 2.24 to 2.96. The acceleration by temperature is much higher than other values of active thick dielectric layer. It is clear that median time to failure is affected by the stress voltage for high volumetric efficiency ceramic capacitors with active thin dielectric layer. The degradation under stress of voltage involves electromigration and accumulation of oxygen vacancy at Ni electrode interface of cathode.