A Study on the Optimum Process Conditions of Hemispherical trained Silicon formation for High Density DRAM'S Capacitor

고밀도 DRAM 캐패시터에서 HSG-Si형성의 공정최적화에 관한 연구

  • 정양희 (여수대학교 전기공학과) ;
  • 강성준 (여수대학교 반도체.응용물리학과)
  • Published : 2001.10.01

Abstract

In this paper, we discuss optimum process conditions of Hemispherical Grained Silicon formation for high density DRAM'S capacitor. In optimum process renditions, the phosphorous concentration, storage polysilicon deposition temperature and thickness of hemispherical grain silicon are in the range of 3.0-4.0E19atoms/㎤, 53$0^{\circ}C$ and 40(equation omitted), respectively. in the 64M bit DRAM capacitor using optimum process conditions, limit thickness of nitride is about 65(equation omitted). The results obtained in this study are applicable to process control and HSG-Si formation for high reliability and high density DRAM's capacitor.

Keywords