• Title/Summary/Keyword: CMOS integrated circuit

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LOW DIRECT-PATH SHORT CIRCUIT CURRENT OF THE CMOS DIGITAL DRIVER CIRCUIT

  • Parnklang, Jirawath;Manasaprom, Ampaul;Laowanichpong, Nut
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.970-973
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    • 2003
  • Abstract An idea to redce the direct-path short circuit current of the CMOS digital integrated circuit is present. The sample circuit model of the CMOS digital circuit is the CMOS current-control digital output driver circuit, which are also suitable for the low voltage supply integrated circuits as the simple digital inverter, are present in this title. The circuit consists of active MOS load as the current control source, which construct from the saturated n-channel and p-channel MOSFET and the general CMOS inverter circuits. The saturated MOSFET bias can control the output current and the frequency response of the circuit. The experimental results show that lower short circuit current control can make the lower frequency response of the circuit.

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Integrated Current-Mode DC-DC Buck Converter with Low-Power Control Circuit

  • Jeong, Hye-Im;Lee, Chan-Soo;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.5
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    • pp.235-241
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    • 2013
  • A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.

Signal line potential variation analysis and modeling due to switching noise in CMOS integrated circuits (CMOS 집적회로에서 스위칭 노이즈에 의한 신호선의 전압변동 해석 및 모델링)

  • 박영준;김용주;어영선;정주영;권오경
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.7
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    • pp.11-19
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    • 1998
  • A signal line potential variation due to the delta-I noise was physically investigated in CMOS integrated circuits. An equivalent circuit for the noise analysis was presented. The signal line was modeled as segmented RC-lumped circuits with the ground noise. Then the equivalent circuit was mathematically analyzed. Therebvy a new signal line potential variation model due to the switching mosie was developed. Th emodel was verified with 0.35.mu.m CMOS deivce model parameters. The model has an excellent agreement with HSPICE simulation. Thus the proposed model can be dirctly employed in the industry to design the high-performance integrted circuit design as well as integrated circuit package design.

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Design of Circuit for a Fingerprint Sensor Based on Ridge Resistivity

  • Jung, Seung-Min
    • Journal of information and communication convergence engineering
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    • v.6 no.3
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    • pp.270-274
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    • 2008
  • This paper proposes an advanced signal processing circuit for a fingerprint sensor based on ridge resistivity. A novel fingerprint integrated sensor using ridge resistivity variation resulting from ridges and valleys on the fingertip is presented. The pixel level simple detection circuit converts from a small and variable sensing current to binary voltage out effectively. The sensor circuit blocks were designed and simulated in a standard CMOS 0.35 ${\mu}m$ process.

Integrated Circuit Design and Implementation of a Novel CMOS Neural Oscillator using Variable Negative Resistor (가변 부성저항을 이용한 새로운 CMOS 뉴럴 오실레이터의 집적회로 설계 및 구현)

  • 송한정
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.4
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    • pp.275-281
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    • 2003
  • A new neural oscillator has been designed and fabricated in an 0.5 ${\mu}{\textrm}{m}$ double poly CMOS technology. The proposed neural oscillator consists of a nonlinear variable resistor with negative resistance as well as simple transconductors and capacitors. The variable negative resistor which is used as a input stage of the oscillator consists of a positive feedback transconductors and a bump circuit with Gaussian-like I-V curve. The proposed neural oscillator has designed in integrated circuit with SPICE simulations. Simulations of a network of 4 oscillators which are connected with excitatory and inhibitory synapses demonstrate cooperative computation. Measurements of the fabricated oscillator chip with a $\pm$ 2.5 V power supply is shown and compared with the simulated results.

A CMOS integrated circuit design of charge-sharing scheme for a capacitive fingerprint sensor (용량형 지문인식센서를 위한 전하분할 방식 감지회로의 CMOS 구현)

  • Nam, Jin-Moon;Lee, Moon-Key
    • Journal of Sensor Science and Technology
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    • v.14 no.1
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    • pp.28-32
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    • 2005
  • In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of $160{\times}192$ array sensing cells (12 by $12.7{\;}mm^{2}$). The chip was fabricated on a 0.35 m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95 V.

A study on a CMOS analog cell-library design-A CMOS on-chip current reference circuit (CMOS 아날로그 셀 라이브레이 설계에 관한 연구-CMOS 온-칩 전류 레퍼런스 회로)

  • 김민규;이승훈;임신일
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.4
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    • pp.136-141
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    • 1996
  • In this paper, a new CMOS on-chip current reference circit for memory, operational amplifiers, comparators, and data converters is proposed. The reference current is almost independent of temeprature and power-supply variations. In the proposed circuit, the current component with a positive temeprature coefficient cancels that with a negative temperature coefficient each other. While conventional curretn and voltage reference circuits require BiCMOS or bipolar process, the presented circuit can be integrated on a single chip with other digiral and analog circits using a standard CMOS process and an extra mask is not needed. The prototype is fabricated employing th esamsung 1.0um p-well double-poly double-metal CMOS process and the chip area is 300um${\times}$135 um. The proposed reference current circuit shows the temperature coefficient of 380 ppm/.deg. C with the temperature changes form 30$^{\circ}C$ to 80$^{\circ}C$, and the output variation of $\pm$ 1.4% with the supply voltage changes from 4.5 V to 5.5 V.

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A 5-20 GHz 5-Bit True Time Delay Circuit in 0.18 ㎛ CMOS Technology

  • Choi, Jae Young;Cho, Moon-Kyu;Baek, Donghyun;Kim, Jeong-Geun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.3
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    • pp.193-197
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    • 2013
  • This paper presents a 5-bit true time delay circuit using a standard 0.18 ${\mu}m$ CMOS process for the broadband phased array antenna without the beam squint. The maximum time delay of ~106 ps with the delay step of ~3.3 ps is achieved at 5-20 GHz. The RMS group delay and amplitude errors are < 1 ps and <2 dB, respectively. The measured insertion loss is <27 dB and the input and output return losses are <12 dB at 5-15 GHz. The current consumption is nearly zero with 1.8 V supply. The chip size is $1.04{\times}0.85\;mm^2$ including pads.

Temperature Stable Current Source Using Simple Self-Bias Circuit

  • Choi, Jin-Ho
    • Journal of information and communication convergence engineering
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    • v.7 no.2
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    • pp.215-218
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    • 2009
  • In this paper, temperature stable current and voltage references using simple CMOS bias circuit are proposed. To obtain temperature stable characteristics of bias circuit a bandgap reference concept is used in a conventional circuit. The parasitic bipolar transistors or MOS transistors having different threshold voltage are required in a bandgap reference. Thereby the chip area increase or the extra CMOS process is required compared to a standard CMOS process. The proposed reference circuit can be integrated on a single chip by a standard CMOS process without the extra CMOS process. From the simulation results, the reference current variation is less than ${\pm}$0.44% over a temperature range from - $20^{\circ}C$ to $80^{\circ}C$. And the voltage variation is from - 0.02% to 0.1%.

A Design of Temperature Sensor Circuit Using CMOS Process (CMOS 공정을 이용한 온도 센서 회로의 설계)

  • Choi, Jin-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.6
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    • pp.1117-1122
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    • 2009
  • In this work, temperature sensor and control circuit for measuring temperature are proposed. The proposed circuit can be fabricated without additional CMOS fabrication process and the output of proposed circuit is digital value. The supply voltage is 5volts and the circuit is designed by using 0.5${\mu}m$ CMOS process. The circuit for measuring temperature consists of PWM control circuit, VCO, counter and register. consisted The frequency of PWM control circuit is 23kHz and the frequency of VCO is 416kHz, 1MHz and 2MHz, respectively. The circuit operation is analyzed by using SPICE.