• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.12
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• pp.2366-2373
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• 2007

In this paper, a low-power and small-area asynchronous 1 kilobit EEPROM for passive UHF RFID tag chips is designed with $0.18{\mu}m$ EEPROM cells. As small area solutions, command and address buffers are removed since we design asynchronous I/O interface and data output buffer is also removed by using separate I/O. To supply stably high voltages VPP and VPPL used in the cell array from low voltage VDD, Dickson charge pump is designed with schottky diodes instead of a PN junction diodes. On that account, we can decrease the number of stages of the charge pump, which can decrease layout area of charge pump. As a low-power solution, we can reduce write current by using the proposed VPPL power switching circuit which selects each needed voltage at either program or write mode. A test chip of asynchronous 1 kilobit EEPROM is fabricated, and its layout area is $554.8{\times}306.9{\mu}m2$., 11% smaller than its synchronous counterpart.

• Korean Journal of Remote Sensing
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• v.23 no.4
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• pp.297-309
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• 2007

The first Korean geostationary weather satellite, Communications, Oceanography and Meteorology Satellite (COMS) will be launched in 2008. The ground station for COMS needs to perform geometric correction to improve accuracy of satellite image data and to broadcast geometrically corrected images to users within 30 minutes after image acquisition. For such a requirement, we developed automated and fast geometric correction techniques. For this, we generated control points automatically by matching images against coastline data and by applying a robust estimation called RANSAC. We used GSHHS (Global Self-consistent Hierarchical High-resolution Shoreline) shoreline database to construct 211 landmark chips. We detected clouds within the images and applied matching to cloud-free sub images. When matching visible channels, we selected sub images located in day-time. We tested the algorithm with GOES-9 images. Control points were generated by matching channel 1 and channel 2 images of GOES against the 211 landmark chips. The RANSAC correctly removed outliers from being selected as control points. The accuracy of sensor models established using the automated control points were in the range of $1{\sim}2$ pixels. Geometric correction was performed and the performance was visually inspected by projecting coastline onto the geometrically corrected images. The total processing time for matching, RANSAC and geometric correction was around 4 minutes.

• Asian-Australasian Journal of Animal Sciences
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• v.32 no.12
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• pp.1836-1843
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• 2019

Objective: Social genetic effects (SGE) are an important genetic component for growth, group productivity, and welfare in pigs. The present study was conducted to evaluate i) the feasibility of the single-step genomic best linear unbiased prediction (ssGBLUP) approach with the inclusion of SGE in the model in pigs, and ii) the changes in the contribution of heritable SGE to the phenotypic variance with different scaling ${\omega}$ constants for genomic relationships. Methods: The dataset included performance tested growth rate records (average daily gain) from 13,166 and 21,762 pigs Landrace (LR) and Yorkshire (YS), respectively. A total of 1,041 (LR) and 964 (YS) pigs were genotyped using the Illumina PorcineSNP60 v2 BeadChip panel. With the BLUPF90 software package, genetic parameters were estimated using a modified animal model for competitive traits. Giving a fixed weight to pedigree relationships (${\tau}:1$), several weights (${\omega}_{xx}$, 0.1 to 1.0; with a 0.1 interval) were scaled with the genomic relationship for best model fit with Akaike information criterion (AIC). Results: The genetic variances and total heritability estimates ($T^2$) were mostly higher with ssGBLUP than in the pedigree-based analysis. The model AIC value increased with any level of ${\omega}$ other than 0.6 and 0.5 in LR and YS, respectively, indicating the worse fit of those models. The theoretical accuracies of direct and social breeding value were increased by decreasing ${\omega}$ in both breeds, indicating the better accuracy of ${\omega}_{0.1}$ models. Therefore, the optimal values of ${\omega}$ to minimize AIC and to increase theoretical accuracy were 0.6 in LR and 0.5 in YS. Conclusion: In conclusion, single-step ssGBLUP model fitting SGE showed significant improvement in accuracy compared with the pedigree-based analysis method; therefore, it could be implemented in a pig population for genomic selection based on SGE, especially in South Korean populations, with appropriate further adjustment of tuning parameters for relationship matrices.

• The Journal of Korean Institute of Next Generation Computing
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• v.15 no.2
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• pp.39-49
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• 2019

Recently, CPU-GPU integrated heterogeneous multicore processors have been widely used for improving the performance of computing systems. Heterogeneous multicore processors integrate CPUs and GPUs on a single chip where CPUs and GPUs share the LLC(Last Level Cache). This causes a serious cache contention problem inside the processor, resulting in significant performance degradation. In this paper, we propose the partitioned LLC architecture to solve the cache contention problem in heterogeneous multicore processors. We analyze the performance impact varying the LLC size of CPUs and GPUs, respectively. According to our simulation results, the bigger the LLC size of the CPU, the CPU performance improves by up to 21%. However, the GPU shows negligible performance difference when the assigned LLC size increases. In other words, the GPU is less likely to lose the performance when the LLC size decreases. Because the performance degradation due to the LLC size reduction in GPU is much smaller than the performance improvement due to the increase of the LLC size of the CPU, the overall performance of heterogeneous multicore processors is expected to be improved by applying partitioned LLC to CPUs and GPUs. In addition, if we develop a memory management technique that can maximize the performance of each core in the future, we can greatly improve the performance of heterogeneous multicore processors.

• Genes and Genomics
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• v.40 no.12
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• pp.1373-1382
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• 2018

Hanwoo and Chikso are classified as Korean native cattle breeds that are currently registered with the Food and Agriculture Organization. However, there is still a lack of genomic studies to compare Hanwoo to Chikso populations. The objective of this study was to perform genome-wide analysis of Hanwoo and Chikso populations, investigating the genetic relationships between these two populations. We genotyped a total of 319 cattle including 214 Hanwoo and 105 Chikso sampled from Gangwon Province Livestock Technology Research Institute, using the Illumina Bovine SNP50K Beadchip. After performing quality control on the initially generated datasets, we assessed linkage disequilibrium patterns for all the possible SNP pairs within 1 Mb apart. Overall, average $r^2$ values in Hanwoo (0.048) were lower than Chikso (0.074) population. The genetic relationship between the populations was further assured by the principal component analysis, exhibiting clear clusters in each of the Hanwoo and Chikso populations, respectively. Overall heterozygosity for Hanwoo (0.359) was slightly higher than Chikso (0.345) and inbreeding coefficient was also a bit higher in Hanwoo (-0.015) than Chikso (-0.035). The average $F_{ST}$ value was 0.036 between Hanwoo and Chikso, indicating little genetic differentiation between those two breeds. Furthermore, we found potential selection signatures including LRP1B and NTRK2 genes that might be implicated with meat and reproductive traits in cattle. In this study, the results showed that both Hanwoo and Chikso populations were not under severe level of inbreeding. Although the principal component analysis exhibited clear clusters in each of the populations, we did not see any clear evidence that those two populations are highly differentiated each other.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.6
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• pp.742-750
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• 2018

In this paper, in order to enable zero-layer FTP cell using only 5V MOS devices on the basis of $0.13{\mu}m$ BCD process, the tunnel oxide thickness is used as the gate oxide thickness of $125{\AA}$ of the 5V MOS device at 82A. The HDNW layer, which is the default in the BCD process, is used. Thus, the proposed zero layer FTP cell does not require the addition of tunnel oxide and DNW mask. Also, from the viewpoint of memory IP design, a single memory structure which is used only for trimming analog circuit of PMIC chip is used instead of the dual memory structure dividing into designer memory area and user memory area. The start-up circuit of the BGR (Bandgap Reference Voltage) generator circuit is designed to operate in the voltage range of 1.8V to 5.5V. On the other hand, when the 64-bit FTP memory IP is powered on, the internal read signal is designed to maintain the initial read data at 00H. The layout size of the 64-bit FTP IP designed using the $0.13-{\mu}m$ Magnachip process .is $485.21{\mu}m{\times}440.665{\mu}m$($=0.214mm^2$).

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.11
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• pp.688-694
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• 2018

The mixture ratio of two-component liquid silicone is important for the inherent physical characteristics of the finished product. Therefore, it is necessary to uniformly control the ratio of the main material and the sub-material. In this paper, a mixing-ratio control system was designed, which consists of a digital flow meter and a flow control system to measure the flow rate of the raw materials and a pumping system to maintain constant pressure and transfer of the raw materials. In addition, a program was developed to control the organic interlocking and mixing ratio. For the verification of the developed system, we compared the actual weight of raw material with the value measured by the flow meter during pumping, and we measured the physical properties of the mixed material by making test samples with and without the application of the mixing-ratio improvement algorithm. The measured value was close to the reference value with a hardness range of 46-47 and tensile strength of 9.3-9.5 MPa. These results show that the mixing ratio of the liquid silicone is controlled within an error range of ${\pm}0.5%$.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.6
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• pp.604-609
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• 2019

In this study, we fabricated a capacitive humidity sensor with interdigitated (IDT) electrodes using a thermosetting polyimide as a humidifying material. First, the number of electrodes, thickness, and spacing of the polyimide film were optimized, and a mask was designed and fabricated. The sensor was fabricated on a silicon substrate using semiconductor processing equipment. The area of the sensor was $1.56{\times}1.66mm^2$, and the width of the electrode and the gap between the electrodes were each $3{\mu}m$. The number of electrodes was 166, and the length of an electrode was 1.294 mm for the sensitivity of the sensor. The sensor was then packaged on a PCB for measurement. The sensor was inserted into a chamber environment with a temperature of $25^{\circ}C$ and connected to an LCR meter to measure the change in capacitance at relative humidity (RH) of 20% to 90%, 1 V, and 20 kHz. The results showed a sensitivity of 26fF/%RH, linearity of < ${\pm}2%RH$, and hysteresis of < ${\pm}2.5%RH$.

• Korean Journal of Materials Research
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• v.29 no.7
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• pp.437-442
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• 2019

Green $BaSi_2O_2N_2:0.02Eu^{2+}$ phosphor is synthesized through a two-step solid state reaction method. The first firing is for crystallization, and the second firing is for reduction of $Eu^{3+}$ into $Eu^{2+}$ and growth of crystal grains. By thermal analysis, the three-time endothermic reaction is confirmed: pyrolysis reaction of $BaCO_3$ at $900^{\circ}C$ and phase transitions at $1,300^{\circ}C$ and $1,400^{\circ}C$. By structural analysis, it is confirmed that single phase [$BaSi_2O_2N_2$] is obtained with Cmcm space group of orthorhombic structure. After the first firing the morphology is rod-like type and, after the second firing, the morphology becomes round. Our phosphor shows a green emission with a peak position of 495 nm and a peak width of 32 nm due to the $4f^65d^1{\rightarrow}4f^7$ transition of $Eu^{2+}$ ion. An LED package (chip size $5.6{\times}3.0mm$) is fabricated with a mixture of our green $BaSi_2O_2N_2$, and yellow $Y_3Al_5O_{12}$ and red $Sr_2Si_5N_8$ phosphors. The color rendering index (90) is higher than that of the mixture without our green phosphor (82), which indicates that this is an excellent green candidate for white LEDs with a deluxe color rendering index.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.29 no.3
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• pp.491-501
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• 2019

In side-channel analysis, which exploit physical leakage from a cryptographic device, deep learning based attack has been significantly interested in recent years. However, most of the state-of-the-art methods have been focused on classifying side-channel information in a profiled scenario where attackers can obtain label of training data. In this paper, we propose a new method based on deep learning to improve non-profiling side-channel attack such as Differential Power Analysis and Correlation Power Analysis. The proposed method is a signal preprocessing technique that reduces the noise in a trace by modifying Auto-Encoder framework to the context of side-channel analysis. Previous work on Denoising Auto-Encoder was trained through randomly added noise by an attacker. In this paper, the proposed model trains Auto-Encoder through the noise from real data using the noise-reduced-label. Also, the proposed method permits to perform non-profiled attack by training only a single neural network. We validate the performance of the noise reduction of the proposed method on real traces collected from ChipWhisperer board. We demonstrate that the proposed method outperforms classic preprocessing methods such as Principal Component Analysis and Linear Discriminant Analysis.