• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.10
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• pp.8-18
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• 1997

In FPGAs, we may use the property of the routing architecture for their routing compared to the routing in the conventional layout style. Especially, the Xilinx XC4000 series FPGAs have very special routing architecture in which the routing problem is equivalent to the two dimensional track assignment problem. In this paper, we propose a new FPgA detailed routing method by developing a two dimensional trackassigment heuristic algorithm. The proposed routing mehtod accept a global routing result as an input and obtain a detailed routing such that the number of necessary wire segments in each connection block is minimized. For all benchmark circuits tested, our routing methd complete routing results. The number of used tracks are also similar to the results by thedirect routing methods.

• Korean Institute of Interior Design Journal
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• no.33
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• pp.11-18
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• 2002

There is an agreement that sociocultural forces affect on the types of arts. There have been a little attempts to draw analogy between architecture and music. There are many objective and subjective factors for this to be true. If, however, the two arts are out of much the same social conditions, they show a degree of conformity in design and general organization. Our study shows the interrelationship between the Residential Space and structure of music. In order to clarify the interrelationship between architecture and music, the study examines ten Residential Spaces suggested by Yi-Jinkyung. The Residential Spaces are analyzed by using theory of Space Syntax. The structure of music is analyzed by tonality, counterpoint and harmony. The comparison between the Residential Spaces and music follows : From Renaissance to the 19th century, they have the same tendency to 1) openness & closure to the outer space and 2) the netting diagram in the inner space & Counterpoint 3) the tree diagram in the space & Harmony

• Journal of the Korean Institute of Landscape Architecture
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• v.31 no.3
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• pp.83-90
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• 2003

This study explored effects of urban greenspace on improving atmospheric environment, which is concerned with $CO_2$, SO$_2$ and NO$_2$ uptake, and with reduction of summer air temperatures. The site of this study was focused on Jung-gu in Seoul. Tree density and cover were 1.1 trees/100 $m^2$ and 12.5% respectively for the study area except forest lands. Atmospheric purification by greenspace was associated with changes in tree cover per unit area of each land use type. The mean $CO_2$ storage by woody plants was 19.4t/ha, and annual uptake averaged 2.2t/ha/yr for $CO_2$, 1.9kg/ha/yr for SO$_2$ and 5.0kg/ha/yr for NO$_2$. Entire tree plantings in the study area played a significant role by annually offsetting $CO_2$ emissions of about 1,830t from fossil fuel consumption by 330 persons, SO$_2$ emissions of 1,620kg by 1,080 persons, and NO$_2$ emissions of 4,230kg by 450 persons. The summer air temperature was 3.6$^{\circ}C$ cooler at a location with 54% cover of woody plants and 4.5$^{\circ}C$ cooler at a forest site with 100% cover, compared to a place with no planting. A 10% increase of woody plant cover was estimated to decrease summer air temperature by approximately 0.6$^{\circ}C$ until a certain level of canopy cover. Analyzing data from the Automatic Weather Stations in Seoul revealed that increasing tree cover decreased mean air temperature for the summer season (Jun~Aug) in a nonlinear function. Woody plant cover was the best predictive variable of summer temperature reduction. The results from this study are expected to be useful in emphasizing the environmental benefits and importance of urban greenspace enlargement, and in urging the necessity for planting and management budgets.

• Journal of the Korean Society of Costume
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• v.56 no.7 s.107
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• pp.85-100
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• 2006

Fashion related with architectural paradigms includes concept of the space utilization beyond fashions field. Such a fashions concept is able to enlarge as a spatial system like architecture. Interface between fashion and architecture is originated in thinking of the rhizome, which understands fashions field within various relationships between environment of the city and fashion. The existing construction systems of fashion is not sufficient in fashions roles as the space that wearing changing body continuously. Consequently, accommodation of architectural paradigms in fashion depends on new recognition about function and space. Architectural paradigms expressed in fashion since 1990s was classified as follows: 1 modular system of Le Corbusier & Archigram, 2 deconstruction, 3 reconstruction, 4 nomadic architecture. Such a paradigms has been easy to combination among fashion and architecture and furniture. Deconstruction and reconstruction fashion revealed process toward completion, and reappeared architectural consideration about process of change toward incompletion. There are acknowledged formative characteristics as follows: mobility, changeability, multi-function, mutual combinative, openness, and fluidity. This study shows that fashion is essential device determined city environment construction in 21C, and revels that fashion has been highlighted as a presage of new spatial economy received architectural construction systems.

• Journal of Information Technology Services
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• v.5 no.2
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• pp.155-168
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• 2006

Software product line is a software product or a set of software system, which has common functions. We can develop a specific software product, which satisfies requirements of a particular market segment and a mission in a specific domain by reusing the core asset such as the developed software architecture through the software product line. Software development methodology based on the software product line can develop a software more easily and fast by reusing the developed software core asset. Developed countries of software technology select software product line as a core field of software production technology, and support technology development. In case of USA, CMU/SEI(Carnegie Mellon University/Software Engineering Institute) developed product-line framework 4.0 together with the industry and the Department of Defense. Europe is supporting the development of product line technology through ITEA(IT for European Advancement) program. However, industries in our country understand the necessity of software production technology based on product line concept for the purpose of increasing productivity, it is not sufficient to invest for this technology development. In this paper, we aim to construct the common architecture of software product line for production of the software product line.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.8
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• pp.453-464
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• 2004

In order to solve the well-known drawback of reduced flexibility that is associate with ASIC implementations, this paper proposes a novel arithmetic unit over GF(2$^{m}$ ) for field programmable gate arrays (FPGAs) implementations of elliptic curve cryptographic processor. The proposed arithmetic unit is based on the binary extended GCD algorithm and the MSB-first multiplication scheme, and designed as systolic architecture to remove global signals broadcasting. The proposed architecture can perform both division and multiplication in GF(2$^{m}$ ). In other word, when input data come in continuously, it produces division results at a rate of one per m clock cycles after an initial delay of 5m-2 in division mode and multiplication results at a rate of one per m clock cycles after an initial delay of 3m in multiplication mode respectively. Analysis shows that while previously proposed dividers have area complexity of Ο(m$^2$) or Ο(mㆍ(log$_2$$^{m}$ )), the Proposed architecture has area complexity of Ο(m), In addition, the proposed architecture has significantly less computational delay time compared with the divider which has area complexity of Ο(mㆍ(log$_2$$^{m}$ )). FPGA implementation results of the proposed arithmetic unit, in which Altera's EP2A70F1508C-7 was used as the target device, show that it ran at maximum 121MHz and utilized 52% of the chip area in GF(2$^{571}$ ). Therefore, when elliptic curve cryptographic processor is implemented on FPGAs, the proposed arithmetic unit is well suited for both division and multiplication circuit.

• Journal of Theoretical and Applied Mechanics
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• v.2 no.1
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• pp.1-14
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• 1996

In this paper, breaking waves are generated in a 2-D wave tank and simulated by using a higher-order boundary element method. A piston-type wavemaker is operated by signals composed of elementary waves. The phase of elementary waves is determined by the linear theory such that they are focused to a prescribed position. Calculated plunging waves coincide well with experiment. A steel box with different plate thicknesses is installed at a predetermined position in the tank. Measured impulsive pressures due to breaking waves are found to be 0.8-1.2$\rho$C2, where $\rho$ corresponds to water density and C to wave celerity. The transverse displacement of the plate is described in terms of modal eigenfunctions. The natural frequencies measured by impact tests in air for thin plate coincide with the computational and theoretical values. The radiationpotential due to plate vibration is derived and the radiation force is expressed in terms of hydroelastic added mass and damping forces. Comparison of natural frequencies of plate in water proves that hydroelastic added mass and damping are properly considered. The measured strain due to regular waves supports the calculated one, but there are apparent discrepancies between theory and experiment in the impulsive case.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.23 no.11
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• pp.711-717
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• 2011

In this study, 5 types of PVS(Passive ventilation system) units are made and experimented its ventilation performance, thermal performance according to open rate and hole diameter of perforated aluminum plane. Results are as follows. 1) The ventilation performance increases approximately 50~70% according by the open rate of PVS increasing. Also, the ventilation performance increases about 2%~12% according by the hole diameter of PVS increasing. 2) In winter temperature/pressure condition(in : $20^{\circ}C$, out : $-2^{\circ}C/{\Delta}P$ : 0.2~5.0Pa) the temperature of inflow air decreases according by the open rate of PVS increasing. Heat gain performance decreases 10.1%, 25.6% when open rate increases 3) In the same condition, Heat gain performance decreases 18.3%, 18.8% according by the hole diameter of PVS increasing.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.5
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• pp.112-117
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• 2007

This paper presents specialized DSP instructions and their hardware architecture for audio coding algorithms, such as the MPEG-2/4 Advanced Audio Coding(AAC), Dolby AC-3, MPEG-2 Backward Compatible(BC), etc. The proposed architecture is specially designed and optimized for the MDCT/IMDCT(Inverse Modified Discrete Cosine Transform), and Huffman decoding of the AAC decoding algorithm. Performance comparisons show a significant improvement compared with TMS320C62x and ASDSP21060 for the MDCT/IMDCT computation. In addition, the dedicated Huffman decoding accelerator performs decoding and preparing operand in only one cycle. The proposed DPU(Data Processing Unit) consists of 107,860 gates and achieves 150 MIPS.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.4
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• pp.307-311
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• 2004

This paper presents an efficient architecture that optimizes the design of SEED S-box using composite field arithmetic. SEED is the Korean standard 128-bit block cipher algorithm developed by Korea Information Security Agency. The nonlinear function S-box is the most costly operation in terms. of size and power consumption, taking up more than 30% of the entire SEED circuit. Therefore the S-box design can become a crucial factor when implemented in systems where resources are limited such as smart cards. In this paper, we transform elements in $GF(2^8)$ to composite field $GF(((2^2)^2)^2)$ where more efficient computations can be implemented and transform the computed result back to $GF(2^8)$. This technique reduces the S-box portion to 15% and the entire SEED algorithm can be implemented at 8,700 gates using Samsung smart card CMOS technology.