Journal of the Institute of Electronics Engineers of Korea SP (대한전자공학회논문지SP)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Efficient DSP Architecture For High- Quality Audio Algorithms

고음질 오디오 알고리즘을 위한 효율적인 DSP 설계

  • Moon, Jong-Ha (System ASIC Technology Group, Digital TV Laboratory LG Electronics Inc.) ;
  • SunWoo, Myung-Hoon (Department of Electrical Engineering, Ajou University)
  • Published : 2007.09.25
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Abstract

This paper presents specialized DSP instructions and their hardware architecture for audio coding algorithms, such as the MPEG-2/4 Advanced Audio Coding(AAC), Dolby AC-3, MPEG-2 Backward Compatible(BC), etc. The proposed architecture is specially designed and optimized for the MDCT/IMDCT(Inverse Modified Discrete Cosine Transform), and Huffman decoding of the AAC decoding algorithm. Performance comparisons show a significant improvement compared with TMS320C62x and ASDSP21060 for the MDCT/IMDCT computation. In addition, the dedicated Huffman decoding accelerator performs decoding and preparing operand in only one cycle. The proposed DPU(Data Processing Unit) consists of 107,860 gates and achieves 150 MIPS.

이 논문은 MPEG-2/4 Advanced Audio Coding(AAC), 돌비 AC-3, MPEG-2 Backward Compatible(BC) 등 오디오 압축 알고리즘을 효율적으로 구현할 수 있는 전용의 하드웨어를 가진 DSP 구조를 제안하며 제안된 전용의 하드웨어를 구동하기 위한 DSP 전용 명령어들을 제공한다. 제안된 구조는 효율적인 MDCT/IMDCT(Inverse Modified Discrete Cosine Transform), 허프만 복호 연산을 지원한다. 제안된 하드웨어 구조는 TMS320C62x, ASDSP21060 등 상용 DSP프로세서와 비교하여 매우 우수한 MDCT/IMDCT 연산 성능을 보인다. 또한 제안된 전용 허프만 복호 가속기는 1 사이클에 복호화 및 오퍼랜드 준비를 병렬 수행하여 고속 연산에 적합하다. 제안된 DPU(Data Processing Unit)는 Samsung SEC $0.18{\mu}m$ 표준 셀 라이브러리를 사용하여 107,860 게이트를 나타내며 150 MIPS 를 나타낸다.

Keywords

References

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