• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.8
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• pp.49-63
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• 1997

This paper presents a current sensor that detects defects in CMOS integrated circuits using the current testing technique. The current sensor is built in a CMOS integrated circuit to test an abnormal current. The proposed circuit has a very small impact on the performance of the circuit under test during the normal mode. In the testing mode, the proposed circuit detects the abnormal current caused by permanent manufacturing defects and determines whether the circuit under test is defect-free or not. The proposed current sensor is simple and requires no external voltage and current sources. Hence, the circuit has less area and performance degradation, and is more efficient than any previous works. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.11
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• pp.1434-1444
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• 1995

Current test has recently been known to be a promising testing method in CMOS VLSI because conventional voltage test can not make sure of the complete detection of bridging, gate-oxide shorts, stuck-open faults and etc. This paper presents a new BIC(built-in current sensor) for the internal current test in CMOS logic circuit. A single phase clock is used in the BIC to reduce the control circuitry of it and to perform a self- testing for a faulty current. The BIC is designed to detect the faulty current at the end of the clock period, so that it can test the CUT(circuit under test) with much longer critical propagation delay time and larger area than conventional BICs. The circuit is composed of 18 devices and verified by using the SPICE simulator.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.2
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• pp.361-366
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• 2007

In the distribution networks, it is necessary to develop small and light voltage and current sensor for compact and digitalized switchgears. For this purpose, some researches have been continuing till now, CT(current transformer) and VT(voltage transformer) are one of that research. But conventional CT and VT have some problems, that is, have big size and saturation characteristics because of used to iron core. In this paper, CS(current sensor) and VS(voltage sensor), have some merits measuring of current and voltage magnitude as a alternated conventional equipment, were studied. So, this paper shows the process CS and VS design method, equivalent circuit and output result, respectively. As a result of this test, proposed CS and VS have linearity for the output, no saturation.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.271-274
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• 2003

This paper presents a Built-in Current Sensor that detect defects in CMOS integrated circuits using the current testing technique. This scheme employs a cross-coupled connected PMOS transistors, it is used as a current comparator. Our proposed scheme is a negligible impart on the performance of the circuit undo. test (CUT). In addition, in the normal mode of the CUT not dissipation extra power, high speed detection time and applicable deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The entire area of the test chip is $116{\times}65{\mu}m^2$. The BICS occupies only $41{\times}17{\mu}m^2$ of area in the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS technology.

• Journal of Korea Multimedia Society
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• v.10 no.10
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• pp.1260-1270
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• 2007

Testing and diagnosis of analog circuits(or mixed-signal circuits) continue to be a hard task for test engineers and efficient test methodologies to solve these problems are needed. This paper proposes a novel analog circuits test technique using time slot specification (TSS) based built-in current sensors (BICS). A technique for location of a fault site and separation of fault type based on TSS is also presented. The proposed built-in current sensors and TSS technique has high testability, fault coverage and a capability to diagnose catastrophic faults and parametric faults in analog circuits. In order to reduce time complexity of test point insertion procedure, external output and power nodes are used for test points and the current sensors are implemented in the automatic test equipment(ATE). The digital output of BICS can be easily combined with built-in digital test modules for analog IC test.

• Journal of IKEEE
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• v.9 no.1 s.16
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• pp.57-64
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• 2005

This paper presents a built-in current sensor(BICS) that detects defects in CMOS integrated circuits using the current testing technique. This circuit employs a cross-coupled connected PMOS transistors, it is used as a current comparator. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT) and high speed detection time. In addition, in the operation of the normal mode, the BlCS does not have dissipation of extra power, and it can be applied to the deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The area overhead of a BlCS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS standard technology.

• Transactions of the Korean Society of Mechanical Engineers
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• v.19 no.9
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• pp.2082-2088
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• 1995

In this paper, we designed and fabricated the magnetic bearings and built-in type cylindrical capacitive transducers for improving the vibration characteristics of rotating shaft. The eddy current and magnetic field from the electromagnet of the bearing don't affect the measuring signal of the capacitive type transducers so that it is possible to locate the capacitive sensor plates around the magnetic bearing poles and can improve the spillover problem which is induced by the noncollocation of the sensors and actuators. According to the sensitivity calibration schemes using a X-Y table, the cylindrical capacitive transducers have a good linearities in the .+-.70.mu.m range from the geometric center of the sensor plates. The measured results also show high displacement sensitivities of the sensors. According to the performance test of the magnetic bearing which is controlled by the analog PD controllers, we found that the built-in capacitive transducer system successfully measures the journal displacement in the magnetic field and therefore the magnetic bearing system supports the rotating shaft up to 12,000 rpm.

• The Journal of the Acoustical Society of Korea
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• v.18 no.3
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• pp.43-48
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• 1999

IDDQ testing is one of current testing methodologies which increases circuit's reliability by means of finding defects which can't be detected by functional testing in CMOS circuits. In this paper, we design a Built-In Current Sensor(BICS) circuit, which can be embedded in chip under test, that performs IDDQ testing. Furthermore, it is designed for IDDQ testing of memories and implemented to carry out testing at high-speed by using small number of transistors.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.1254-1257
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• 2004

This paper presents a built-in current sensor(BICS) that can detect defects in CMOS integrated circuits through current testing technique - Iddq test. Current test has recently been known to a complementary testing method because traditional voltage test cannot cover all kinds of bridging defects. So BICS is widely used for current testing. but there are some critical issues - a performance degradation, low speed test, area overhead, etc. The proposed BICS has a two operating mode- normal mode and test mode. Those methods minimize the performance degradation in normal mode. We also used a current-mode differential amplifier that has a input as a current, so we can realize higher speed current testing. Furthermore, only using 10 MOSFETS and 3 inverters, area overhead can be reduced by 6.9%. The circuit is verified by HSPICE simulation with 0.25 urn CMOS process parameter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.5
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• pp.431-438
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• 2005

In this paper, we propose the built-in current testing circuit for improving reliability As the integrated CMOS circuits in a chip are increased, the testability on design and fabrication should be considered to reduce the cost of testing and to guarantee the reliability In addition, the high degree of integration makes more failures which are different from conventional static failures and introduced by the short between transistor nodes and the bridging fault. The proposed built-in current testing method is useful for detecting not only these failures but also low current level failures and faster than conventional method. In normal mode, the detecting circuit is turned off to eliminate the degradation of CUT(Circuits Under Testing). The differential input stage in detecting circuit prevents the degradation of CUT in test mode. It is expected that this circuit improves the quality of semiconductor products, the reliability and the testability.