• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.918-921
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• 1999

The breakdown voltage in fully depleted SOI N-MOSFET’s have been studied over a wide range of film thicknesses, channel doping, and channel lengths. An asynmmetric Source/Drain SOI technology is proposed, which having the advantages of Normal LDD SOI(Silicon-On-Insulator) for breakdown voltage and gives a high drivability of LDD SOI without sacrificings hot carrier immunity The two-dimensional simulations have been used to investigate the breakdown behavior in these device. It is found that the breakdown voltage(BVds) is almost same with high current drivability as that in Normal LDD SOI device structure.

• 한국건축시공학회:학술대회논문집
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• 한국건축시공학회 2021년도 봄 학술논문 발표대회
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• pp.305-306
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• 2021

Breakdown structure (BS) is a tool used to allocate information packages for various management functions and drive computerized information systems. Although several BS exists, work breakdown structures (WBS) and cost breakdown structures (CBS) are the most widely studied and used in previous literature. Nevertheless, heterogeneity of BS and respective management capabilities in current practices are not adequately addressed. In this context, this paper compared the management capabilities of various BS in both building and plant industries through systematic literature. Management requirements and applications scope, in terms of life cycle and stakeholder, were analyzed, respectively. Finally, finding and lesson-learned are outlined.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 추계학술대회 논문집 전기물성,응용부문
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• pp.26-28
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• 2001

A Trench schottky diode with guard ring is proposed to improve the forward current density and reverse breakdown voltage. The simulation results by Silvaco have shown that the reverse breakdown voltage of the proposed device was found to be 22.1V while that of conventional trench device was 17.25V. The breakdown voltage of the proposed structure was 28.1% higher than that of the conventional trench structure.

• Journal of Electrical Engineering and Technology
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• 제9권2호
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• pp.686-694
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• 2014

A power semiconductor device, usually used as a switch or rectifier, is very significant in the modern power industry. The power semiconductor, in terms of its physical properties, requires a high breakdown voltage to turn off, a low on-state resistance to reduce static loss, and a fast switching speed to reduce dynamic loss. Among those parameters, the breakdown voltage and on-state resistance rely on the doping concentration of the drift region in the power semiconductor, this effect can be more important for a higher voltage device. Although the low doping concentration in the drift region increases the breakdown voltage, the on-state resistance that is increased along with it makes the static loss characteristic deteriorate. On the other hand, although the high doping concentration in the drift region reduces on-state resistance, the breakdown voltage is decreased, which limits the scope of its applications. This addresses the fact that breakdown voltage and on-state resistance are in a trade-off relationship with a parameter of the doping concentration in the drift region. Such a trade-off relationship is a hindrance to the development of power semiconductor devices that have idealistic characteristics. In this study, a novel structure is proposed for the Insulated Gate Bipolar Transistor (IGBT) device that uses conductivity modulation, which makes it possible to increase the breakdown voltage without changing the on-state resistance through use of a P-floating layer. More specifically in the proposed IGBT structure, a P-floating layer was inserted into the drift region, which results in an alleviation of the trade-off relationship between the on-state resistance and the breakdown voltage. The increase of breakdown voltage in the proposed IGBT structure has been analyzed both theoretically and through simulations, and it is verified through measurement of actual samples.

• 한국전기전자재료학회논문지
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• 제33권2호
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• pp.83-87
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• 2020

In this letter, we propose and analyze a new asymmetric structure that can be used for next-generation power semiconductor devices. We compare and analyze the electrical characteristics of the proposed device with respect to those of symmetric devices. The proposed device has a p-emitter on the right side of the cell. The peak electric field is reduced by the shielding effect caused by the p-emitter structure. Consequently, the breakdown voltage is increased. The proposed asymmetric structure has an approximately 100% higher Baliga's figure of merit (~94.22 MW/㎠) than the symmetric structure (~46.93 MW/㎠), and the breakdown voltage of the device increases by approximately 70%.

• E2M - 전기 전자와 첨단 소재
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• 제9권4호
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• pp.364-371
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• 1996

In this study, in order to investigate the applicability of IPN structure to epoxy resin which has been widely used as electrical and electronic insulating materials, DC dielectric breakdown properties and morphology were compared and analyzed according to variation of network structure, using the single network structure specimen formed of epoxy resin alone, interpenetrating polymer network specimen formed of epoxy resin/methacrylic acid resin, and interpenetrating polymer network specimen formed of epoxy resin/methacrylic acid resin/polyurethane resin. As results of the measunnent of DC dielectric breakdown strength at 50[.deg. C] and 130[>$^{\circ}C$], IPN specimen formed of epoxn, resin 100[phr] and methacrylic acid resin 35[phr] was the most excellent, and which corresponded to the SEM phenomena. The effect of IPN was more remarkable at high temperature region than at low temperature region. It is supposed that the defect of epoxy resin, dielectric breakdown strength is lowered remarkably at high temperature region, be complemented according to introducing IPN method.

• 한국전기전자재료학회논문지
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• 제21권11호
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• pp.981-986
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• 2008

The conventional IGBT has two problems to make the device taking high performance. The one is high on state voltage drop associated with JFET region, the other is low breakdown voltage associated with concentrating the electric field on the junction of between p base and n drift. This paper is about the structure to effectively improve both the lower on state voltage drop and the higher breakdown voltage than the conventional IGBT. For the fabrication of the circular trench IGBT with the circular trench layer, it is necessary to perform the only one wet oxidation step for the circular trench layer. Analysis on both the on state voltage drop and the breakdown voltage show the improved values compared to the conventional IGBT structure. Because the circular trench layer disperses electric field from the junction of between p base and n drift to circular trench, the breakdown voltage increase. The on state voltage drop decrease due to reduction of JFET region and direction changed of current path which pass through reversed layer channel. The electrical characteristics were studied by MEDICI simulation results.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권6호
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• pp.257-260
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• 2003

We have proposed the junction termination structure of IGBT (Insulated Gate Bipolar Transistor) by employing trench and FLR (Field Limiting Ring), which decrease the junction termination area at the same breakdown voltage. Our proposed junction termination structure, trench FLR is verified by numerical simulator MEDICI. In 600V rated device, the junction termination area is decreased 20% compared with that of the conventional FLR structure. The breakdown voltage of trench FLR with 4 trenches is 768 V, 99 % of ideal parallel-plane junction(1-D) $BV_ceo$.

• 전기전자학회논문지
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• 제17권2호
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• pp.129-134
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• 2013

For the conventional power metal-oxide semiconductor field-effect transistor (MOSFET) device structure, there exists a tradeoff relationship between specific on-resistance ($R_{ON.SP}$) and breakdown voltage ($V_{BR}$). In order to overcome the tradeoff relationship, a uniform super-junction (SJ) trench metal-oxide semiconductor field-effect transistor (TMOSFET) structure is studied and designed. The structure modeling considering doping concentrations is performed, and the distributions at breakdown voltages and the electric fields in a SJ TMOSFET are analyzed. The simulations are successfully optimized by the using of the SILVACO TCAD 2D device simulator, Atlas. In this paper, the specific on-resistance of the SJ TMOSFET is successfully obtained 0.96 $m{\Omega}{\cdot}cm^2$, which is of lesser value than the required one of 1.2 $m{\Omega}{\cdot}cm^2$ at the class of 100 V and 100 A for BLDC motor.

• 한국건설관리학회:학술대회논문집
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• 한국건설관리학회 2006년도 정기학술발표대회 논문집
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• pp.571-573
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• 2006

본 연구에서는 리스크관리 인자별 중요도와 4D 객체 시각화방법론을 통한 리스크관리 정보의 시각화 모델을 제안한다. 리스크관리 프로세스 모델은 WBS(Work Breakdown Structure)와 RBS(Risk Breakdown Structure)를 통해 구성되며, RBS에서 분류된 리스크 인자는 퍼지 분석기법을 통해 중요도(Weight)가 분석된다. 이 중요도는 4D 시각화를 위한 건설공사 객체(Object)의 속성 데이터로 지정된다. 또한 Object의 4D 시각화를 위한 방안으로는 4D 시뮬레이션기법이 활용되며, 등급별로 구분된 리스크 인자의 중요도와 4D 시뮬레이션을 통해 직접적인 건설공사 부위별 리스크관리 수준 확인과 부위별 리스크 인자의 시각화가 가능하도록 하는 방법론을 제시한다.