• 대한전자공학회논문지TC
• /
• 제38권7호
• /
• pp.7-13
• /
• 2001

와이어본딩 기법은 공정이 쉽고 신뢰성이 우수하기 때문에 현재의 초고주파 회로 제작에 가장 일반적으로 사용되는 접속선 기술이다. 그러나, 밀리미터파 대역의 높은 주파수에서는 본드와이어에 의한 기생특성이 크게 증가하며, 이러한 기생특성은 시스템 전체의 성능에 큰 제한을 가져온다. 본 논문에서는 $20{\sim}35$ GHz의 광대역에서 본드와이어의 전송특성을 해석하고 측정하였으며, 그 견과를 리본의 특성과 비교하였다. 측정 및 비교 결과 이중 본드와이어 구조를 사용함으로써 35 GHz 까지 0.55 dB 이내의 작은 삽입 손실특성을 얻을 수 있었으며, 측정 주파수 전 대역에 걸쳐 리본과 거의 같은 특성을 나타내었다. 따라서 다중 와이어본딩 기법이 성능과 공정 측면에서 리본보다 밀리미터파 대역용 패키징에 더욱 적합함을 확인하였다.

• IEIE Transactions on Smart Processing and Computing
• /
• 제4권3호
• /
• pp.158-162
• /
• 2015

A low phase noise CMOS voltage controlled oscillator(VCO) for multi-band/multi-standard RF Transceivers is presented. For both wide tunability and low phase noise characteristics, Hybrid inductor which uses both bondwire inductor and planar spiral inductor in the same area, is proposed. This approach reduces inductance variation and presents high quality factor without custom-designed single-turn inductor occupying large area, which improves phase noise and tuning range characteristics without additional area loss. An LC VCO is designed in a 0.13um CMOS technology to demonstrate the hybrid inductor concept. The measured phase noise is -121dBc/Hz at 400KHz offset and -142dBc/Hz at 3MHz offset from a 900MHz carrier frequency after divider. The tuning range of about 28%(3.15 to 4.18GHz) is measured. The VCO consumes 7.5mA from 1.3V supply and meets the requirements for GSM/EDGE and WCDMA standard.

• 전기학회논문지
• /
• 제56권9호
• /
• pp.1638-1642
• /
• 2007

This paper investigated the destruction effect of the semiconductors by impact of high power electromagnetic wave. The experiments is employed as an open-ended waveguide to study the destruction effects on semiconductor using a 2.45 GHz 600 W Magnetron as a high power electromagnetic wave. The semiconductors are located at a distance of $31cm\sim40cm$ from the open-ended waveguide and are composed of a LED drive circuit for visual discernment. Also the chip condition of semiconductor is observed by SEM(Scanning Electron Microscope) analysis. The semiconductor are damaged by high power electromagnetic wave at about 860 V/m. The SEM analysis of the destructed devices showed onchipwire and bondwire destructions. Based on the result, semiconductor devices should have plan to protect the semiconductor devices form high power electromagnetic wave. And the database from this experiment provides the basis for future investigation.

• 한국정보기술응용학회:학술대회논문집
• /
• 한국정보기술응용학회 2005년도 6th 2005 International Conference on Computers, Communications and System
• /
• pp.99-102
• /
• 2005

In the paper, a proposed VCO based on bondwire inductances and nMOS varactors was implemented in a standard $0.25\;{\mu}m$ CMOS process. Using the new drain current model and a propagation delay time model equations, the operation speed of CMOS gate will predict the dependence on the load capacitance and the depth of oxide, threshold voltage, the supply voltage, the channel length. This paper describes the result of simulation which calculated a gate propagation delay time by using new drain current model and a propagation delay time model. At the result, When the reverse bias voltage on the substrate changes from 0 voltage to 3 voltage, the propagation delay time is appeared the delay from 0.8 nsec to 1 nsec. When the reverse voltage is biased on the substrate, for reducing the speed delay time, a supply voltage has to reduce. The $g_m$ value of MOSFET is calculated by using new drain current model.

• 전기학회논문지
• /
• 제56권7호
• /
• pp.1282-1287
• /
• 2007

We investigated the damage of the CMOS IC which manufactured three different technologies by high power microwave. The tests separated the two methods in accordance with the types of the CMOS IC located inner waveguide. The only CMOS IC which was located inner waveguide was occurred breakdown below the max electric field (23.94kV/m) without destruction but the CMOS IC which was connected IC to line organically was located inner waveguide and it was occurred breakdown and destruction below the max electric field. Also destructed CMOS IC was removed their surface and a chip condition was analyzed by SEM. The SEM analysis of the damaged devices showed onchuipwire and bondwire destruction like melting due to thermal effect. The tested results are applied to the fundamental data which interprets the combination mechanism of the semiconductors from artificial electromagnetic wave environment and are applied to the data which understand electromagnetic wave effects of electronic equipments.

• 한국군사과학기술학회지
• /
• 제11권6호
• /
• pp.148-155
• /
• 2008

We investigated the damage effects of microcontroller devices under high power electromagnetic(HPEM) wave. HPEM wave was radiated from the open-ended standard rectangular waveguide(WR-340) to free space. The influence of different reset-, clock-, data-, and power supply-line lengths has been tested. The susceptibility of the tested microcontroller devices was in general much influenced by clock-, reset-, and power supply-line length, little influenced by data-line length. Further the line length was increased, the malfunction threshold was decreased as expected, because more energy couples to the devices. The surfaces of the destroyed microcontroller devices were removed and the chip conditions were investigated with microscope. The microscopic analysis of the damaged devices showed component and bondwire destructions such as breakthroughs and melting due to thermal effects.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2007년도 제38회 하계학술대회
• /
• pp.1512-1513
• /
• 2007

In this paper the influence of CMOS- and TTL-technology on the breakdown and destruction effects by artificial electromagnetic waves is determined. Different electronic devices(3 CMOS & 5 TTL) were exposed to high amplitude electromagnetic waves. CMOS ICs were occurred only destruction below the max electric field and TTL ICs were occurred breakdown and destruction below the max electric field. The SEM analysis of the destruction devices showed onchipwire and bondwire destruction like melting due to thermal effect. The test results are applied to the data which understand electromagnetic wave effects of electronic equipments.

• 한국안전학회지
• /
• 제22권5호
• /
• pp.27-32
• /
• 2007

We investigated the damage of the TTL ICs which manufactured five different technologies by artificial microwave. The artificial microwave was rated at a microwave output from 0 to 1000W, at a frequency of 2.45GHz. The microwave power was extracted into a standard rectangular waveguide(WR-340) and TTL ICs were located into the waveguide. TTL ICs were damaged two types. One is breakdown which means no physical damage is done to the system and after a reset the system is going back into function. The other is destruction which means a physical damage of the system so that the system will not recover without a hardware repair. TTL SN74S08N and SN74ALS08N devices get a breakdown and destruction occurred but TTL SN74LS08N, SN74AS08N and 74F08N devices get a destruction occurred. Also destructed TTL ICs were removed their surface and a chip conditions were analyzed by SEM. The SEM analysis of the damaged devices showed onchipwire and bondwire destruction like melting due to thermal effect. The tested results expect to be applied to the fundamental data which interprets the combination mechanism of the semiconductors from artificial microwave environment.

• 전자공학회논문지D
• /
• 제35D권10호
• /
• pp.91-97
• /
• 1998

10 Gbps용 전계 흡수형 InGaAsP/InGaAsP 응력 완화 MQW (Multiple Quantum Well) 광변조기의 변조 성능은 패키징후 발생되는 기생 특성에 의해서 큰 영향을 받음을 확인하였다. 이 초고주파 기생 특성은 변조기의 변조 대역폭을 제한하고 처핑 변수를 증가시키는 요인이 된다. 따라서, 이러한 기생 성분중 고속·광대역 변조시 변조 성능을 크게 저하시키는 본딩와이어에 의한 유도성 기생성분을 최소화시키기 위해 유전체 몰딩된 이중 본딩와이어 구조를 제안하였다. 50 Ω 저항으로 병렬 종단된 MQW 광변조기에 제안된 본 구조를 이용할 경우, 패키징전에 비하여 변조 대역폭이 약 125 %가 확대됨을 확인하였다. 또한 이 구조를 이용할 경우 기존에 무시되었던 패키징 기생 특성에 의한 처핑 변수의 영향을 최소화시킬 수 있는 효과적인 방법이 됨을 확인하였다. 본 연구 결과는 10 Gbps 대역 이상의 초고속 외부 광변조기의 변조 성능 극대화를 위한 최적 패키지 구현 자료로서 유용하게 사용될 수 있다.

• Journal of electromagnetic engineering and science
• /
• 제9권1호
• /
• pp.25-31
• /
• 2009

This paper describes CMOS VCO circuit design procedures and techniques for multi-band/multi-standard RF transceivers. The proposed techniques enable a 4 GHz CMOS VCO to satisfy all requirements for Quad-band GSMIEDGE and WCDMA standards by achieving a good trade-off among important specifications, phase noise, power consumption, modulation performance, and chip area efficiency. To meet the very stringent GSM T/Rx phase noise and wide frequency range specifications, the VCO utilizes bond-wire inductors with high-quality factor, an 8-bit coarse tune capbank for low VCO gain(30$\sim$50 MHz/V) and an on-chip $2^{nd}$ harmonic noise filter. The proposed VCO is implemented in $0.13{\mu}m$ CMOS technology. The measured tuning range is about 34 %(3.17 to 4.49 GHz). The VCO exhibits a phase noise of -123 dBc/Hz at 400 kHz offset and -145 dBc/Hz at 3 MHz offset from a 900 MHz carrier after LO chain. The calculated figure of merit(FOM) is -183.5 dBc/Hz at 3 MHz offset. This fully integrated VCO occupies $0.45{\times}0.9\;mm^2$.