• Proceedings of the IEEK Conference
• /
• 2001.06b
• /
• pp.305-308
• /
• 2001

This paper describes the design of elliptic curve cryptographic (ECC) coprocessor over binary fields for the If card. This coprocessor is implemented by the shift-and-add algorithm for the field multiplication algorithm. And the modified almost inverse algorithm(MAIA) is selected for the inverse multiplication algorithm. These two algorithms is merged to minimize the hardware size. Scalar multiplication is performed by the binary Non Adjacent Format(NAF) method. The ECC we have implemented is defined over the field GF(2$^{163}$), which is a SEC-2 recommendation［7］..

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2022.05a
• /
• pp.246-248
• /
• 2022

Binary Edwards curves (BEdC), a new form of elliptic curves proposed by Bernstein, satisfy the complete addition law without exceptions. This paper describes an efficient hardware implementation of point scalar multiplication on BEdC using projective coordinates. Modified Montgomery ladder algorithm was adopted for point scalar multiplication, and binary field arithmetic operations were implemented using 257-bit binary adder, 257-bit binary squarer, and 32-bit binary multiplier. The hardware operation of the BEdC crypto-core was verified using Zynq UltraScale+ MPSoC device. It takes 521,535 clock cycles to compute point scalar multiplication.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.24 no.8
• /
• pp.1044-1051
• /
• 2020

The age of quantum computers is coming soon. In order to prepare for the upcoming future, the National Institute of Standards and Technology has recruited candidates to set standards for post quantum cryptography to establish a future cryptography standard. The submitted ciphers are expected to be safe from quantum algorithm attacks, but it is necessary to verify that the submitted algorithm is safe from quantum attacks using quantum algorithm even when it is actually operated on a quantum computer. Therefore, in this paper, we investigate an efficient quantum gate implementation for binary field multiplication of code based post quantum cryptography to work on quantum computers. We implemented the binary field multiplication for two field polynomials presented by Classic McEliece and three field polynomials presented by ROLLO in generic algorithm and Karatsuba algorithm.

• Proceedings of the IEEK Conference
• /
• 2001.09a
• /
• pp.25-28
• /
• 2001

A theory of binary wavelets has been recently proposed by using two-band perfect reconstruction filter banks over binary field . Binary wavelet transform (BWT) of binary images can be used as an alternative to the real-valued wavelet transform of binary images in image processing applications such as compression, edge detection, and recognition. The BWT, however, requires large amount of computations since its operation is accomplished by matrix multiplication. In this paper, a fast BWT algorithm which utilizes filtering operation instead or matrix multiplication is presented . It is shown that the proposed algorithm can significantly reduce the computational complexity of the BWT. For the decomposition and reconstruction or an N ${\times}$ N image, the proposed algorithm requires only 2LN$^2$ multiplications and 2(L-1)N$^2$addtions when the filter length is L, while the BWT needs 2N$^3$multiplications and 2N(N-1)$^2$additions.

• Journal of the Chungcheong Mathematical Society
• /
• v.15 no.2
• /
• pp.97-107
• /
• 2003

An efficient algorithm for the multiplication in a binary finite filed using a normal basis representation of $F_{2^m}$ is discussed and proposed for software implementation of elliptic curve cryptography. The algorithm is developed by using the storage scheme of sparse matrices.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.7
• /
• pp.1267-1275
• /
• 2017

This paper describes a design of cryptographic processor supporting 233-bit elliptic curves over binary field defined by NIST. Scalar point multiplication that is core arithmetic in elliptic curve cryptography(ECC) was implemented by adopting modified Montgomery ladder algorithm, making it robust against simple power analysis attack. Point addition and point doubling operations on elliptic curve were implemented by finite field multiplication, squaring, and division operations over $GF(2^{233})$, which is based on affine coordinates. Finite field multiplier and divider were implemented by applying shift-and-add algorithm and extended Euclidean algorithm, respectively, resulting in reduced gate counts. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 49,271 gate equivalents (GEs), and the estimated maximum clock frequency is 345 MHz. One scalar point multiplication takes 490,699 clock cycles, and the computation time is 1.4 msec at the maximum clock frequency.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.14 no.2
• /
• pp.121-126
• /
• 2014

The problem of finding the fastest algorithm for multiplication of two large n-digit decimal numbers remains unsolved in the field of mathematics and computer science. To this problem so far two algorithms - Karatsuba and Toom-kook - have been proposed to shorten the number of multiplication. In the complete opposite of shorten the number of multiplication method, this paper therefore proposes an efficient multiplication algorithm using additions completely. The proposed algorithm totally applies shift-and-add algorithm of binary system to large digits of decimal number multiplication for example of RSA-100 this problem can't perform using computer. This algorithm performs multiplication purely with additions of complexity of $O(n^2)$.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.24 no.6
• /
• pp.736-743
• /
• 2020

Modular multiplication is one of the most important arithmetic operations in public-key cryptography such as elliptic curve cryptography (ECC) and RSA, and the performance of modular multiplier is a key factor influencing the performance of public-key cryptographic hardware. An efficient hardware implementation of word-based Montgomery modular multiplication algorithm is described in this paper. Our modular multiplier was designed to support eleven field sizes for prime field GF(p) and binary field GF(2k) as defined by SEC2 standard for ECC, making it suitable for lightweight hardware implementations of ECC processors. The proposed architecture employs pipeline scheme between the partial product generation and addition operation and the modular reduction operation to reduce the clock cycles required to compute modular multiplication by 50%. The hardware operation of our modular multiplier was demonstrated by FPGA verification. When synthesized with a 65-nm CMOS cell library, it was realized with 33,635 gate equivalents, and the maximum operating clock frequency was estimated at 147 MHz.

• The Journal of Korean Association of Computer Education
• /
• v.5 no.4
• /
• pp.43-52
• /
• 2002

A theory of binary wavelets which are performed over binary field has been recently proposed. Binary wavelet transform (BWT) of binary images can be used as an alternative to the real-valued wavelet transform of binary images in image processing applications such as compression, edge detection, and recognition. The BWT, however, requires large amount of computations for binary wavelet reconstruction since its operation is accomplished by matrix multiplication. In this paper, an efficient binary wavelet reconstruction method which utilizes filtering operation instead of matrix multiplication is presented. Experimental results show that the proposed algorithm can significantly reduce the computational complexity of the BWT. For the reconstruction of an $N{\times}N$ image, the proposed technique requires only $2MN^2$ multiplications and $2N(M-1)^2$ additions when the filter length M, while the BWT needs $2N^3$ multiplications and $2N(N-1)^2$ additions.

• ETRI Journal
• /
• v.26 no.3
• /
• pp.241-251
• /
• 2004

We propose two improved scalar multiplication methods on elliptic curves over $F_{{q}^{n}}$ $q= 2^{m}$ using Frobenius expansion. The scalar multiplication of elliptic curves defined over subfield $F_q$ can be sped up by Frobenius expansion. Previous methods are restricted to the case of a small m. However, when m is small, it is hard to find curves having good cryptographic properties. Our methods are suitable for curves defined over medium-sized fields, that is, $10{\leq}m{\leq}20$. These methods are variants of the conventional multiple-base binary (MBB) method combined with the window method. One of our methods is for a polynomial basis representation with software implementation, and the other is for a normal basis representation with hardware implementation. Our software experiment shows that it is about 10% faster than the MBB method, which also uses Frobenius expansion, and about 20% faster than the Montgomery method, which is the fastest general method in polynomial basis implementation.