Browse > Article
http://dx.doi.org/10.6109/jkiice.2020.24.6.736

Montgomery Multiplier Supporting Dual-Field Modular Multiplication  

Kim, Dong-Seong (School of Electronic Engineering, Kumoh National Institute of Technology)
Shin, Kyung-Wook (School of Electronic Engineering, Kumoh National Institute of Technology)
Abstract
Modular multiplication is one of the most important arithmetic operations in public-key cryptography such as elliptic curve cryptography (ECC) and RSA, and the performance of modular multiplier is a key factor influencing the performance of public-key cryptographic hardware. An efficient hardware implementation of word-based Montgomery modular multiplication algorithm is described in this paper. Our modular multiplier was designed to support eleven field sizes for prime field GF(p) and binary field GF(2k) as defined by SEC2 standard for ECC, making it suitable for lightweight hardware implementations of ECC processors. The proposed architecture employs pipeline scheme between the partial product generation and addition operation and the modular reduction operation to reduce the clock cycles required to compute modular multiplication by 50%. The hardware operation of our modular multiplier was demonstrated by FPGA verification. When synthesized with a 65-nm CMOS cell library, it was realized with 33,635 gate equivalents, and the maximum operating clock frequency was estimated at 147 MHz.
Keywords
Dual-field; Elliptic curve cryptography; Galois field; Modular multiplication; Montgomery multiplier;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Z. Liu, D. Liu, and X. Zou, "An Efficient and Flexible Hardware Implementation of the Dual-Field Elliptic Curve Cryptographic Processor," IEEE Transactions on Industrial Electronics, vol. 64, no. 3, pp. 2353-2362, Mar. 2017.   DOI
2 C. A. Lara-Nino, A. Diaz-Perez, and M. Morales-Sandoval, "Elliptic Curve Lightweight Cryptography: A Survey," in IEEE Access, vol. 6, pp. 72514-72550, 2018.   DOI
3 N. Thampi, and M. E. Jose, "Montgomery Multiplier for Faster Cryptosystems," Procedia Technology, vol. 25, pp. 392-398, 2016.   DOI
4 D. B. Roy, and D. Mukhopadhyay, "High-Speed Implementation of ECC Scalar Multiplication in GF(p) for Generic Montgomery Curves," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 7, pp. 1587-1600, July 2019.   DOI
5 P. L. Montgomery, "Modular multiplication without trial division," Mathematics of computation, vol. 44, no. 170, pp. 519-521, Apr. 1985.   DOI
6 A. Nadjia, and A. Mohamed, "High Throughput Parallel Montgomery Modular Exponentiation on FPGA," in Proceeding of the 9th International Symposium on Design and Test, Algiers, pp. 225-230, 2014.
7 A. Rezai, and P. Keshavarzi, "High-throughput Modular Multiplication and Exponentiation Algorithms using Multibit-scan-multibit-shift Technique," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 9, pp. 1710-1719, Sep. 2015.   DOI
8 C. K. Koc, T. Acar, and B. S. Kaliski, "Analyzing and Comparing Montgomery Multiplication Algorithms," IEEE Micro, vol. 16, no. 3, pp. 26-33, Jun. 1996.   DOI
9 S. H. Lee, "A Lightweight ECC Processor Supporting Dual Field Elliptic Curves of GF(p) and GF(2m)," Master's Thesis, Kumoh National Institute of Technology, Jun. 2019.
10 D. S. Kim, and K. W. Shin, "A Design of Montgomery Modular Multiplier supporting Prime Field and Binary Field," Proceedings of 2019 1st Conference of the Institute of Electronics and Information Engineers, vol. 42, no. 1, pp. 54-55, Jeju, 2019.
11 SEC 2. "Elliptic Curve Cryptography," Standards for Efficient Cryptography Group, Sep. 2000.
12 R. Verna, M. Duttam, and R. Vig, "FPGA Implementation of Modified Montgomery for RSA Cryptosystem," International Journal of Computer Science and Telecommunication, vol. 4, no. 1, pp. 42-46. Jan. 2013.
13 Y. Yang, C. Wu, Z. Li, and J. Yang "Efficient FPGA Implementation of Modular Multiplication based on Montgomery Algorithm," Microprocessors and Microsystems, vol. 47, pp. 209-215, Apr. 2016.   DOI
14 S. Erdem, T. Yamk, and A. Celebi, "A General Digit-Serial Architecture for Montgomery Modular Multiplication," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 5, pp. 1658-1668. May 2017.   DOI