• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.16-23
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• 2003

In this paper, we propose an efficient bias circuit of discrete BJT component for hearing aid. The collector feedback bias circuit, widely used for the hearing aid, has a resistor for negative feedback. As the resistor affects AC and DC simultaneously, it is quite difficult to adjust amplifier gain without changing DC bias point. The previous bias circuit also has weak point to be oscillated by the positive feedback of power noise if gain of hearing aid is high. In the proposed circuit, we can reduce the two weak points of the previous circuit by adding a resistor to the collector feedback bias circuit between base and power supply which is $\beta$ times target than the collector resistor. Thus. we can change amplifier gain without changing DC bias point, and reduce power noise gain about 18.5% compare to that of tile previous circuit in the simulation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.9
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• pp.882-888
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• 2002

This paper proposed a bias stability circuit that compensates the degradation of MMIC's performance for the variation of the process and temperature. The proposed bias circuit proved the superior effect compared with the conventional bias circuit using the constant current source. It designed and fabricated simultaneously two amplifier on one layout for comparison in same conditions. One is amplifier with conventional bias circuit using constant current source and the other is amplifier with proposed bias stability circuit. The chip was measured the microwave performances under process variation that classed the level NOM, MIN and MAX. The amplifier with a conventional bias circuit using constant current source has 6.4 dB gain variation and 7 mA Ids variation at 1.8 GHz, but the amplifier with the proposed bias circuit has the 2.1 dB gain variation and 3 mA Ids variation. As the result, MMIC having the proposed bias circuit shows the superior compensation of the quiescent point than the MMIC having the conventional bias circuit under the variations of the process and temperature and can improve the yield of the MMIC. The fabricated chip size is 1.2 mm $\times$ 1.4 mm.

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1263-1268
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• 2008

In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

• Journal of information and communication convergence engineering
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• v.15 no.2
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• pp.112-116
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• 2017

In this work, we demonstrated a low noise and high linearity low noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) with novel active bias circuit for LTE applications. The device technology used in this work relies on a process involving a $0.25-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (PHEMT). The LNA MMIC with a novel active bias circuit has a small signal gain of $19.7{\pm}1.5dB$ and output third order intercept point (OIP3) of 38-39 dBm in the frequency range 1.75-2.65 GHz. The noise figure (NF) is less than 0.58 dB over the full bandwidth. Compared with the characteristics of the LNA MMIC without using the novel active bias circuit, the OIP3 is improved about 2-3 dBm. The small signal gain and NF showed no significant change after using the active bias circuit. The novel active bias circuit indeed improves the linearity performance of the LNA MMIC without degradation.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.10
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• pp.43-46
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• 2012

In this paper, high efficiency power amplifier is implemented with high gain amplifier. Two-stage amplifier using adaptive bias control circuit improve efficiency at low input power. Fixed bias circuit and adaptive bias circuit both have about 76 % efficiency at maximum power level. However amplifier using an adaptive bias control circuit has 70 % at 6 dBm input power level when the amplifier using fixed bias circuit has 50%. The proposed power amplifier using the adaptive bias control circuit can have high efficiency at lower power level.

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.231-234
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• 2002

In this paper, we propose an efficient bias circuit for hearing aid using discrete BJT. The collector feedback bias circuit, widely used for the hearing aid, has a resister for negative feedback. As the resistor affects AC and DC simultaneously, it is quite difficult to adjust amplifier gain without changing DC bias point. The previous bias circuit also has weak point to be oscillated by the positive feedback of power noise if gain of hearing aid is high. In the proposed circuit, we can reduce the two weak points of the previous circuit by adding a resistor which is ${\beta}$ times larger than collector resistor between base of BJT and power supply.

• Current Optics and Photonics
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• v.5 no.2
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• pp.173-179
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• 2021

The electroluminescence (EL) intensities of GaN-based light-emitting diodes (LEDs) are estimated based on their photoluminescence (PL) properties. The PL intensity obtained under open-circuit conditions is divided into two parts: the PL intensity under a forward bias lower than the optical turn-on voltage, and the difference between the PL intensities under open-circuit conditions and under forward bias. The luminescence induced by photoexcitation under a constant forward bias lower than the optical turn-on voltage is primarily the PL from the excited area of the LED. In contrast the intensity difference, obtained by subtracting the PL intensity under the forward bias from that under open-circuit conditions, contains the EL induced by the photocarriers generated during photoexcitation. In addition, a reverse photocurrent is generated during photoexcitation under constant forward bias across the LED, and can be correlated with the PL-intensity difference. The relationship between the photocurrent and PL-intensity difference matches well the relationship between the injection current and EL intensity of LEDs. The ratio between the photocurrent generated under a bias and the short-circuit current is related to the ratio between the PL-intensity difference and the PL intensity under open-circuit conditions. A relational expression consisting of the ratios, short-circuit current, and PL under open-circuit conditions is proposed to estimate the EL intensity.

• The Journal of the Korea Contents Association
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• v.6 no.3
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• pp.38-45
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• 2006

A dual-level low voltage differential signalling (DLVDS) circuit is proposed aiming at reducing transmission lines for a LCD driver IC. We apply two data to the proposed DLVDS circuit as inputs. Then, the transmitter converts two inputs to two kinds of fully differential signals. In this circuit, two transmission lines are sufficient to transfer two inputs while keeping the LVDS feature. However, the circuit has a common mode bias fluctuation due to difference of the input bias and the reference bias. We compensate the common mode bias fluctuation using a feedback circuit of the current source bias. The receiver recovers the original input data through a level decoding circuit. We fabricated the proposed circuit using $0.25{\mu}m$ CMOS technology. The simulation results of proposed circuit shows 1-Gbps/2-line data rate and 35mW power consumption at 2.5V supply voltage, respectively.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.963-966
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• 1999

This Paper describes the design of high speed and low power comparator based on the feed forward bias control. Major building blocks of this comparator are composed of input offset canceling circuit and feed forward bias control circuit. The usual offset canceling circuit cancels the offset voltages by storing them in capacitors using MOS switches, The comparator of this paper employs the bias control circuit which generates bias signal from the input signal. The bias signal is applied to the capacitors and keeps the transfer of chares in the capacitors in the minimal amount, therefore making the comparator operate in stable condition and reduce decision time. The comparator in this form has very samll area and power dissipation. Maximum sampling rate is 200 Ms/sec. The comparator is designed in 0.65${\mu}{\textrm}{m}$ technology and the offset is less than 0.5㎷.

• ETRI Journal
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• v.19 no.2
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• pp.35-47
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• 1997

A power amplifier operating at 3.3 V has been developed for CDMA/AMPS dual-mode cellular phones. It consists of linear GaAs power MESFET's, a new gate bias control circuit, and an output matching circuit which prevents the drain terminal of the second MESF from generating the harmonics. The relationship between the intermodulation distortion and the spectral regrowth of the power amplifier has been investigated with gate bias by using the two-tone test method and the adjacent channel leakage power ratio (ACPR) method of CDMA signals. The dissipation power of the power amplifier with a gate bias control circuit is minimized to below 1000 mW in the range of the low power levels while satisfying the ACPR of less than -26 dBc for CDMA mode. The ACPR of the power amplifier is measured to be -33 dBc at a high output power of 26 dBm.