• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.4
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• pp.1121-1133
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• 1998

In this paper, a new method is proposed for a simple andaccurate design of larage-sigal power amplifier using the output current- and volage- waveform analysis. An existing high-efficiency theory, Harmonic Loading, is modified to apply to a real device, and the notion of "actual bias point at large-signal input" is proposed. Based on the proposed theory, 2GHz band poweramplifier is implemented using HEMT device, and the implemented amplifier shows 14dBm output power, 46% drain efficienty, 38% power-added efficiency and 7.8dB gain at 2V bias voltage.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.6
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• pp.107-116
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• 1994

In this paper, The electrical properties of MOS capacitors and transistoras with gate of in-situ doped amorphous Si and poly Si doped by POCI$_3$. Under constant current F-N stress, MOS capacitors with in-situ doped amorphous Si gate have shown the best resistance to degradation in reliabilty properties such as increase of leakage current, shift of gate voltage (V$_{g}$). shift of flat band voltage (V$_{fb}$) and charge to breakdown(Q$_{bd}$). Also, MOSFETs with in-situ doped amorphous Si gate have shown to have less degradation in transistor properties such as threshold voltage, transconductance and drain current. These improvements observed in MOS devices with in-situ doped amorphous Si gate is attributed to less local thinning spots at the gate/SiO$_2$ interface, caused by the large grain size and the smoothness of the surface at the gate/SiO$_2$ interface.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.4
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• pp.40-50
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• 1993

In this paper, MODFET devices with various gate length are simulated using the Monte-Carlo method. The number of superparticle is 5000 and the Poisson equation is solved to obtain field distribution. The structure of MODFET is n-AlGaAs/i-AlGaAs/iGaAs and doping concentration of n-AlGaAs layer is 1${\times}10^{17}/cm^{3}$ and the thickness is 500.angs., and the thickness of i-AlGaAs is 50$\AA$. The devices with gate length 0.2$\mu$m, 0.5$\mu$m, 1.0$\mu$m respctively are simulated and the current-voltage curves and transport characteristics of that devices are obtained. Occupancy of each subband and electron energy distribution and conduction energy band in channel have been analyzed to obtain transport characteristics, and particles transposed from source to drain have been analyzed to current-voltage curves. Current level is highest for the device of Lg=0.2$\mu$m and transconductance of this device is 310mS/mm.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.81-82
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• 2007

This paper presents a WLAN band active monopole antenna which is made of a CPW-fed monopole antenna and a low noise amplifier implemented on single-layer low-temperature co-fired ceramic (LTCC) substrate. Planar active antenna measure return loss and power test. (drain voltage = 4V, gate voltage = -0.6V). The bandwidth, is 540MHz, return loss is -38dB.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.473-476
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• 1987

Low temperature phosphorus-nitride CVD was newly developed for a high quality gate insulator on InP substrate. This film showed the Poole-Frenkel type conduction in high electric field with resistivity higher than $1{\times}10^{14}$ ohm-cm near the electric field of $1{\times}10^7\;volt/cm$. The C-V hysteresis width was very small as 0.17 volt. The density of interface trap states was $2{\times}10^{11}cm^{-2}ev^{-1}$ below the conduction band edge of InP substrate. Effective electron mobility was about $1200-1500\;cm^2/Vsec$ and showed the instability of PN-InP MISFETs drain current reduced less than 10 percent for the period $0.5-10^3sec$.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.679-682
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• 2005

Negative-differential conductance (NDC) characteristics as well as negative-differential trans-conductance (NDT) characteristics have been observed in the room temperature I-V characteristics of Field-induced Inter-band Tunneling Effect Transistors (FITETs). These characteristics have been explained with inter-band tunneling physics, from which, inter-band tunneling current flows when the energy bands of degenerately doped regions align, and it does not flow when they don't. FITET is an SOI device and the body region is not directly connected to the external terminal. Therefore, Fermi energy in the body region is determined by electrical coupling among four regions - gate, source, drain and substrate. So, a quasi Fermi energy of the majority carriers in the floating body region can be changed by external voltages, and this causes the energy band movements in the body region, which determine whether the energy bands between degenerately doped junctions aligns or not. This is a key point for an explanation of NDT and NDC characteristics. In this paper, a quasi Fermi energy movement in the floating body region of FITET was investigated by a device simulation. This result was applied for the description of relation between quasi Fermi energy in the body region and external gate bias voltage.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.9 no.5
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• pp.72-79
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• 2010

In this paper, we describe the design and implementation of a high efficiency Doherty power amplifier using gallium nitride (GaN) high-electron mobility transistor (HEMT). The carrier and peaking amplifiers of the proposed Doherty power amplifier consist of the switching-mode Class-E power amplifiers. The test conditions are a duty of 10% and a pulse width of $100\;{\mu}s$ and pulse repetition frequency (PRF) of 1 kHz for a S-band radar application. A RF performance peak PAE of 64% with drain efficiency of 80.6%, at 6 dB output back-off point from saturated output power of 45.5 dBm, was obtained at 2.85 GHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.339-345
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• 2016

This paper presents a two-stage power amplifier MMIC using a $0.4{\mu}m$ GaN-HEMT process. The two-stage structure provides high gain and compact circuit size using an integrated inter-stage matching network. The size and loss of the inter-stage matching network can be reduced by including bond wires as part of the matching network. The two-stage power amplifier MMIC was fabricated with a chip size of $2.0{\times}1.9mm^2$ and was mounted on a $4{\times}4$ QFN carrier for evaluation. Using a downlink LTE signal with a PAPR of 6.5 dB and a channel bandwidth of 10 MHz for the 2.6 GHz band, the power amplifier MMIC exhibited a gain of 30 dB, a drain efficiency of 32%, and an ACLR of -31.4 dBc at an average output power of 36 dBm. Using two power amplifier MMICs for the carrier and peaking amplifiers, a Doherty power amplifier was designed and implemented. At a 6 dB back-off output power level of 39 dBm, a gain of 24.7 dB and a drain efficiency of 43.5% were achieved.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05a
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• pp.53-56
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• 2004

The a-Si:H TFT using ferroelectric of SrTi $O_3$as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$and S $i_3$ $N_4$. Ferroelctric increases on-current, decreases thresh old voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, refractive index of 1.8~2.0 and resistivity of 10$^{13}$ - 10$^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60~100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8~20${\mu}{\textrm}{m}$ and channel width of 80~200${\mu}{\textrm}{m}$. And it shows that drain current is 3.4$mutextrm{A}$ at 20 gate voltage, $I_{on}$ / $I_{off}$ is a ratio of 10$^{5}$ - 10$^{8}$ and $V_{th}$ is 4~5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $mutextrm{A}$ at 20 gate voltage and $V_{th}$ is 5~6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.zed.d.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1064-1073
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• 2013

In this paper, a compact 370 W high efficiency GaN(Gallium Nitride) HEMT(High Electron Mobility Transistor) power amplifier(PA) using internal harmonic manipulation circuits is presented for cellular and L-band. We employed a new circuit topology for simultaneous high efficiency matching at both fundamental and 2nd harmonic frequency. In order to minimize package size, new 41.8 mm GaN HEMT and two MOS(Metal Oxide Semiconductor) capacitors are internally matched and combined package size $10.16{\times}10.16{\times}1.5Tmm^3$ through package material changes and wire bonded in a new package to improve thermal resistance. When drain biased at 48 V, the developed GaN HEMT power amplifier has achieved over 80 % Drain Efficiency(DE) from 770~870 MHz and 75 % DE at 1,805~1,880 MHz with 370 W peak output power(Psat.). This is the state-of-the-art efficiency and output power of GaN HEMT power amplifier at cellular and L-band to the best of our knowledge.