• Title/Summary/Keyword: BIT(Built In Test)

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Built-In-Test Coverage Analysis Considering Failure Mode of Electronics Components (전자부품 고장모드를 고려한 Built-In-Test 성능분석)

  • Seo, Joon-Ho;Ko, Jin-Young;Park, Han-Joon
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.43 no.5
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    • pp.449-455
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    • 2015
  • Built-In-Test(hereafter: BIT) is necessary functionality for aircraft flight safety and it requires a high failure detection capacity of more than 95 % in the case of avionics equipment. The BIT coverage analysis is needed to make sure that BIT meets its fault diagnosis capability. FMECA is used a lot of for the BIT coverage analysis. However, in this paper, the BIT coverage analysis based on electronic components is introduced to minimize the analytical error. Further, by applying the failure mode of the electronic components and excluding electronic components that do not affect flight safety, the BIT coverage analysis can be more accurate. Finally, BIT demo was performed and it was confirmed that the performance of the actual BIT matches the analysis of BIT performance.

Improvements in Design and Evaluation of Built-In-Test System (무기체계 정비성 향상을 위한 BIT 설계 및 검증 방안)

  • Heo, Wan-Ok;Park, Eun-Shim;Yoon, Jung-Hwan
    • Journal of the Korea Institute of Military Science and Technology
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    • v.15 no.2
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    • pp.111-120
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    • 2012
  • Built-In-Test is a design feature in more and more advanced weapon system. During development test and evaluation(DT&E) it is critical that the BIT system be evaluated. The BIT system is an integral part of the weapon system and subsystem. Built-In-Test assists in conducting on system and subsystem failure detection and isolation to the Line Replaceable Unit(LRU). This capability reduces the need for highly skilled personnel and special test equipment at organizational level, and reduces maintenance down-time of system by shortening Total Corrective Maintenance Time. During DT&E of weapon system the objective of BIT system evaluation is to determine BIT capabilities achieved and to identify deficiencies in the BIT system. As a result corrective actions are implemented while the system is still in development. Through the use of the reiterative BIT evaluation the BIT system design was corrected, improved, or updated, as the BIT system matured.

Process Improvement Methodology for The Efficient Built-In-Test Development (효율적인 Built-In-Test 개발을 위한 프로세스 개선 방안)

  • Park, Doo-Ho;Kim, Young-Gyun;Kim, Bong-Won;Ahn, Hyo-Chul;Shin, Won;Chang, Chun-Hyon
    • Proceedings of the Korean Information Science Society Conference
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    • 2012.06b
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    • pp.214-216
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    • 2012
  • BIT(Built-in Test)란 소프트웨어와 하드웨어의 기능 및 상태를 진단하고 오류에 대응하기 위한 방법론으로 빠른 오류 대처가 있어야 하는 다양한 분야에서 사용되고 있다. 현업에서의 BIT는 도메인의 특성에 따라 고려해야 하는 요소가 많으므로 각 도메인에 맞춰 구조화되지 않은 형태로 개발되고 있다. 따라서 기존 개발 방법론은 반복적인 작업이 수반되며 적용 환경 및 상활에 따라 변화하는 부분을 매번 새로 개발하기 위해 많은 인력과 시간이 필요하다는 문제점을 가진다. 이를 해결하기 위하여 본 논문에서는 개선된 BIT 개발 프로세스를 제안한다. 제안하는 프로세스는 BIT 처리 과정을 일반화하여 명세하고 이를 활용하여 BIT 처리 코트를 자동 생성한다. 그리고 BIT 코드를 검증할 수 있는 시뮬레이션 환경을 제공한다. 이를 통해 BIT 처리 구조 개발 과정의 편의성과 생산성을 향상하고 BIT 처리 구조의 유연성과 확장성 그리고 안정성을 높일 수 있다.

Design for Automatic code generation of Built-In-Test based on XML Description (XML 명세 기반 Built-In-Test 코드 자동 생성 체계)

  • Park, Doo-Ho;Shin, Won;Chang, Chun-Hyon;Roh, Young-Nam;Yu, Suk-Jin;Ha, Dong-Hyun
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.04a
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    • pp.1208-1210
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    • 2012
  • BIT(Built-In Test)란 S/W 또는 H/W 의 기능 및 상태를 진단하고 오류에 대응하기 위한 방법론으로 기능에 대한 신뢰성 및 빠른 오류 복구를 보장하기 때문에 다양한 분야에서 BIT 처리를 통해 시스템의 안정성을 높이고 있다. 현업에서의 BIT 는 도메인 특성에 따라 처리해야 하는 작업의 변화가 크기 때문에 구조화 되지 않은 형태로 각각 개발되고 있다. 따라서 BIT 개발 시 반복적인 작업이 수반되며 처리 과정의 수정 또는 처리 범위의 확장을 위해서는 많은 시간 및 인력이 요구된다. 이에 본 논문에서는 BIT 처리를 구조화하기 위하여 처리과정에 필요한 정보들을 일반화된 형태로 기록할 수 있도록 하는 BIT 처리 병세 방안과 BIT 처리 명세를 기반으로 한 자동 코드 생성 체계를 제안한다. 이를 통해 개발 과정의 편의성과 생산성을 향상하고 BIT 처리의 유연성과 확장성을 높일 수 있다.

Design and Verification of Built In Test For KUH (한국형 기동헬기 자체진단 시험 설계 및 입증)

  • Kim, Sung-Woo;Lee, Byoung-Hwa;Chang, Won-Hong;Oh, Woo-Seop
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.40 no.7
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    • pp.623-628
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    • 2012
  • Mission Equipment Package(MEP) system is a collection of avionic components that are integrated to perform the mission of the Korean Utility Helicopter(KUH). Built In Test(BIT) reduces the need for skilled personnel and special test equipment, and reduces maintenance down-time of system. The increasing complexity of avionics equipments has resulted in an increased need to provide BIT functions. This paper describe the development and verification for the KUH MEP system BIT.

USEFUL REDUNDANT TECHNIQUES FOR BUILT -IN -TEST RELATED SYSTEM

  • Yoo, Wang-Jin;Oh, Hyun-Seung
    • Journal of Korean Institute of Industrial Engineers
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    • v.21 no.2
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    • pp.183-194
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    • 1995
  • This research paper describes several possible suggestions which are essential to develop for Built-In-Test(BIT) related systems, such as more precise BIT parameter analysis, sensitivity analysis of the impact of BIT on redundant systems, statistical inference of field data for BIT performance parameters, methods of reducing BIT false alarms, BIT application in industrial automation and remote control, prevent the system from the impact of BIT failure, undetections and false alarms, life cycle cost analysis for BIT. And, it is mainly focused on redundancy technique for solving BIT diagnostic problems. Algorithms for redundant systems : overlapping technique, flexible redundant BITs are presented and case study will be shown based on various experiment.

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ALU Design & Test for 32-bit DSP RISC Processors (32비트 DSP RISC 프로세서를 위한 ALU 설계 및 테스트)

  • 최대봉;문병인
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.1169-1172
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    • 1998
  • We designed an ALU(Airthmetic Logic Unit) with BIST(Built-In Self Test), which is suitable for 32-bit DSP RISC processors. We minimized the area of this ALU by allowing different operations to share several hardware blocks. Moreover, we applied DFT(Design for Testability) to ALU and offered Bist(Built-In Self-Test) function. BIST is composed of pattern generation and response analysis. We used the reseeding method and testability design for the high fault coverage. These techniques reduce the test length. Chip's reliability is improved by testing and the cost of testing system can be reduced.

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A Study of Built-In-Test Diagnosis Mistakes as a False Alarm Filter Useful Redundant Techniques for Built-in-Test Related System

  • Oh, Hyun Seung;Yoo, Wang Jin
    • Journal of Korean Society for Quality Management
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    • v.21 no.2
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    • pp.1-16
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    • 1993
  • Early generations of products had little to no inherent capability to test themselves. The technologies involved often required only visual inspection and limited probing to troubleshoot the system once it was turned over to maintenance personnel. However, as the complexity of military and commercial systems grew, symptoms of failure became less noticeable to the operator. Therefore, the procedure to access, inspect, repair and replace a component became complicated, the requirements for personnel skill and testing equipment increased. and it took too long of a time to maintain a system. Meanwhile, the need for availability became more mission-critical and maintenance become very expensive. The obvious solution was to design in-system circuits or devices to self-test the primary system, the Built-In-Test(BIT) was born. This approach has continued right on up through present systems and is an integral part of systems now being designed. The object of this paper is to present a state-of-the-art research for filtering out the BIT diagnosis mistakes using Bayesian analysis and develop the algorithm for Redundant systems with BIT to improve BIT diagnosis.

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Performance Evaluation Involving Multiple Parameters in Built-In-Test Systems

  • Kang, Hee-Jung;Yoo, Wang-Jin
    • Journal of the Korean Operations Research and Management Science Society
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    • v.16 no.2
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    • pp.148-158
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    • 1991
  • The Built-In-Test (BIT) system is an integrated subsystem for the determination of the health status of any primary system. The BIT consists of hardware and software installations directed at performance of the functions of fault detection, diagnosis and isolation, as well as primary system record failure information. Evaluation of the difinitions appropriate to the BIT system, including system characteristics and parameters, is important to an understanding of system functions. The object of this paper is to present general definitions of the BIT diagnosis parameters and a semiquantiative evaluation method for BIT systems. Finally, two case studies for actual problem solutions are included.

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A Study on Fault History Management Equipment of Unmanned Aerial Systems (무인항공기 체계의 고장이력관리장비에 관한 연구)

  • Soh, Nahyun
    • Journal of Aerospace System Engineering
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    • v.13 no.3
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    • pp.48-55
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    • 2019
  • This paper presents a study on Fault History Management Equipment (FHME) of Unmanned Aerial Systems (UAS). UAS comprise of various types of electronic equipment for high reliability design for flight safety. Consequently, it is mandatory for each on-board equipment to have its own Built-In-Test (BIT) function, because rapid fault-detections for UAS are necessary. FHME is developed for the purposes of display, storage and management of such BIT results on ground. This paper describes the outline, development requirements, design and verification process of FHME.