Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 1998.10a
- /
- Pages.1169-1172
- /
- 1998
ALU Design & Test for 32-bit DSP RISC Processors
32비트 DSP RISC 프로세서를 위한 ALU 설계 및 테스트
Abstract
We designed an ALU(Airthmetic Logic Unit) with BIST(Built-In Self Test), which is suitable for 32-bit DSP RISC processors. We minimized the area of this ALU by allowing different operations to share several hardware blocks. Moreover, we applied DFT(Design for Testability) to ALU and offered Bist(Built-In Self-Test) function. BIST is composed of pattern generation and response analysis. We used the reseeding method and testability design for the high fault coverage. These techniques reduce the test length. Chip's reliability is improved by testing and the cost of testing system can be reduced.
Keywords