• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.9
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• pp.667-670
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• 2010

In this paper, a high voltage current sensing circuit for boost converter is designed and verified by Cadence SPECTRE simulations. The current mirror pair, power and sensing metal-oxide semiconductor field effect transistors (MOSFETs) with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side lateral-diffused MOS transistor (LDMOST) switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35 ${\mu}m$ BCD process show that current sensing is accurate and the pulse frequency modulation (PFM) boost converter using the proposed current sensing circuit satisfies with the specifications.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.4
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• pp.612-616
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• 2012

This paper presents an active current regulator for LED driver IC. The proposed driver circuit is consists of DC-DC converter for supplying constant DC voltage to LED, active current regulator for compensating channel-to-channel current error from LED strings and feedback circuit for controlling duty ratio of the converter. The proposed active current regulator senses current of LED channels by equalizing both $V_{DS}$ and $V_{GS}$ at LED current control transistor. Because the proposed circuit directly measures the LED channel current without a sensing resistor and regulates all channel with same regulation loop, the power consumption and the current error are much small compared with previous works. The measured maximum efficiency of overall LED driver IC is approximately 94% and current error of LED channel-to-channel is under ${\pm}1.3%$. The proposed LED driver IC is fabricated Dongbu 0.35um BCD process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.14-14
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• 2010

A high voltage current sensing circuit for LED driver IC is designed and verfied by Cadence SPECTRE simulations. The current mirror pair, power and sensing MOSFETs with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side LDMOST switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35um BCD process show that current sensing is accurate with properly frequency compensated opamp.

• Journal of Power Electronics
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• v.16 no.3
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• pp.840-848
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• 2016

A primary-side regulation AC-DC converter operating in the PFM (Pulse Frequency Modulation) mode with a high precision output current is designed, which applies a novel inductance compensation technique to improve the precision of the output current, which reduces the bad impact of the large tolerance of the transformer primary side inductance in the same batch. In this paper, the output current is regulated by the OSC charging current, which is controlled by a CC (constant current) controller. Meanwhile, for different primary inductors, the inductance compensation module adjusts the OSC charging current finely to improve the accuracy of the output current. The operation principle and design of the CC controller and the inductance compensation module are analyzed and illustrated herein. The control chip is implemented based on a TSMC 0.35μm 5V/40V BCD process, and a 12V/1.1A prototype has been built to verify the proposed control method. The deviation of the output current is within ±3% and the variation of the output current is less than 1% when the inductances of the primary windings vary by 10%.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.88-94
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• 2011

In this paper, we design a 1-kb OTP (Onetime programmable) memory IP in consideration of BCD process based EM (Electro-migration) and resistance variations of eFuse. We propose a method of precharging BL to VSS before activation of RWL (Read word-line) and an optimized design of read NMOS transistor to reduce read current through a non-programmed cell. Also, we propose a sensing margin test circuit with a variable pull-up load out of consideration for resistance variations of programmed eFuse. Peak current through the non-programmed eFuse is reduced from 728 ${\mu}A$ to 61 ${\mu}A$ when a simulation is done in the read mode. Furthermore, BL (Bit-line) sensing is possible even if sensed resistance of eFuse has fallen by about 9 $k{\Omega}$ in a wafer read test through a variable pull-up load resistance of BL S/A (Sense amplifier).

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.9
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• pp.1275-1282
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• 2012

This paper proposes the 16-channel LED Driver IC for Full color LED display system. The proposed LED driver IC in this paper can draw current independent of temperature and supply voltage in each channel. Current flow in the channel is configurable via an external resistor. LED brightness is adjusted by 12-Bit PWM(Pulse Width Modulation) and 8-Bit DC(Dot Correction). A real-time monitoring of IC temperature ($130^{\circ}C/150^{\circ}C$) and LED status (open/short) is provided by LED driver IC and the user can receive warning and get information on problems. A 16-channel LED driver IC is produced using 0.35 um BCD process and the size is $2.5mm{\times}2.5mm$. In this paper, channel current characteristic and channel current control function were measured in order to verify am embodied 16-channel LED driver IC by producing a single IC test board.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.4
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• pp.269-274
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• 2021

In secret communication, steganography is the sending and receiving of secret messages without being recognized by a third party. In the spatial domain method bitwise information is inserted into the virtual bit plane of the decomposed pixel values of the image. That is, the bitwise secret message is sequentially inserted into the least significant bit(LSB) of the image, which is a cover medium. In terms of application, the LSB is simple, but has a drawback that can be easily detected by a third party. If the upper bit plane is used to increase security, the image quality may deteriorate. In this paper, I present a method for concealing Hangul secret messages in image steganography based on the lo-th bit plane and the decomposition of modified pixel intensity values. After decomposing the Hangeul message to be hidden into choseong, jungseong and jongseong, then a shuffling process is applied to increase confidentiality and robustness. PSNR was used to confirm the efficiency of the proposed method. It was confirmed that the proposed technique has a smaller effect in terms of image quality than the method applying BCD and Fibonacci when inserting a secret message in the upper bit plane. When compared with the reference value, it was confirmed that the PSNR value of the proposed method was appropriate.

• Resources Recycling
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• v.6 no.2
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• pp.22-28
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• 1997

In recent yean thc problem of wastc plastics arc greatly incrcascd with ihe result uf lndushial growth. As a rcsult the amount of wastc plaslics in domestic area is appraxhnately 2,300,000 t<~nin 1996 base and contmuously increasing more than 12% cvcry ycar. Thc disposal way of these waste plastics arc dlLl malnly rely~ng on landill1 or partially incinuralion So that it hss become a senous social problem due to the second envirnmentd pollution. The tcchnologics iar prducing oil from the waste plastics have hccn dcvelopcd far along pennd and currently some of them are in a commercialiration stage Pyrolysis process in one of the major process m heating waslc plaslics bul still has some restlichons for the cammcrc~dizatian duc lo 11s emnom~cal problems assaciated with a systcmiltlc lecd collcctionidispnsJ ways. Cansldenng cnvaomcnld problems, thc inclease m the charge for waste matcds trcatmcnt and thc lmlitarion ni disposal area, it is inteicstcd that the wastc plastics treabncnt by pyrolysn. which would be the safest and the most eilic~ent process for cnnvcrting fecd wastc to rc-usablc rcsourccs. would he predomhant m ihe near h~lurc Thc shldy aims inr the development of haslc ted~nolagy for scaling up to a com~nercial sire through pyrolys~s process which is cnnduclcd under the absence of air. Furthern~orc the waste plastics can be recycled as iual gas or oil wilhout harmful effects in enviroment, The waste w e d plastics arc pyrolyzed in (he fluidized bcd rcaclor under continuous way and thc ail ylcld gives approx~marcly 47 4%.

• Journal of Information Display
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• v.13 no.2
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• pp.73-82
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• 2012

In this paper, a light-emitting diode (LED) backlight driver integrated circuit (IC) for medium-sized liquid crystal displays (LCDs) is proposed. In the proposed IC, a linear current regulator with matched internal resistors and an adaptive phase-shifted pulse-width modulation (PWM) dimming controller are also proposed to improve LED current uniformity and reliability. The double feedback loop control boost converter is used to achieve high power efficiency, fast transient characteristic, and high dimming frequency and resolution. The proposed IC was fabricated using the 0.35 ${\mu}m$ bipolar-CMOS-DMOS (BCD) process. The LED current uniformity and LED fault immunity of the proposed IC were verified through experiments. The measured power efficiency was 90%; the measured LED current uniformity, 97%; and the measured rising and falling times of the LED current, 86 and 7 ns, respectively. Due to the fast rising and falling characteristics, the proposed IC operates up to 39 kHz PWM dimming frequency, with an 8-bit dimming resolution. It was verified that the phase difference between the PWM dimming signals is changed adaptively when LED fault occurs. The experiment results showed that the proposed IC meets the requirements for the LED backlight driver IC for medium-sized LCDs.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.9 no.4
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• pp.419-427
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• 2016

In this paper, a 64b small-area MTP memory IP is designed. A VPPL (=VPP/3) regulator and a VNN (=VNN/3) charge pump are removed since the inhibit voltages of an MTP memory cell are all 0V instead of the conventional voltages of VPP/3 and VNN/3. Also, a VPP charge pump is removed since the VPP program voltage is supplied from an external pad. Furthermore, a VNN charge pump is designed to provide its voltage of -VPP as a one-stage negative charge pump using the VPP voltage. The layout size of the designed 64b MTP memory IP with MagnaChip's $0.18{\mu}m$ BCD process is $377.585{\mu}m{\times}328.265{\mu}m$ (=0.124mm2). Its DC-DC converter related layout size is 76.4 percent smaller than its conventional counterpart.