• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.6-12
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• 2010

A sigma-delta modulator based class-D audio amplifier is presented. Parallel digital input is serialized to two-bit output by a fourth-order digital sigma-delta noise shaper. The output of the digital sigma-delta noise shaper is applied to a fourth-order analog sigma-delta modulator whose three-level output drives power switches. The pulse density modulated (PDM) output of the power switches is low-pass filtered by an LC-filter. The PDM output of the power switches is fed back to the input of the analog sigma-delta modulator. The first integrator of the analog sigma-delta modulator is a hybrid of continuous-time (CT) and switched-capacitor (SC) integrator. While the sampled input is applied to SC path, the continuous-time feedback signal is applied to CT path to suppress the noise of the PDM output. The class-D audio amplifier is fabricated in a standard $0.13-{\mu}m$ CMOS process and operates for the signal bandwidth from 100-Hz to 20-kHz. With 4-${\Omega}$ load, the maximum output power is 18.3-mW. The total harmonic distortion plus noise and dynamic range are 0.035-% and 80-dB, respectively. The modulator consumes 457-uW from 1.2-V power supply.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.271-273
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• 2007

본 논문에서는 TV나 Audio등에 사용되는 2채널 30W급 Class-D amplifier를 동부하이텍의 0.35um BD350BA 공정을 사용하여 디지털 방식의 Class-D amplifier 출력단 구동에 적합하도록 설계하였다. 출력단은 Bootstrap 전원을 사용한 N-N type의 30V LDMOS 내장형이며 각각 $250m{\Omega}$의 턴 온 저항을 갖게 설계 되었다. THD+N 특성개선을 위한 Dead time 및 Delay 조정회로를 내장하였으며 보호회로로는 Over current, Over temperature, UVLO 가 있다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.44-53
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• 2008

In this paper, we present the design of delta-sigma modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates PWM(pulse width modulation) signals using a single-bit fourth-order high-performance delta-sigma modulator. To achieve a high SNR(signal-to-noise ratio) and ensure system stability, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard $0.18{\mu}m$ CMOS process. The active area of the chip is $1.6mm^2$. It operates for the signal bandwidth from 20Hz to 20kHz. The measured THD+N(total harmonic distortion plus noise) at the $32{\Omega}$ load terminal is less than 0.03% from a 3V power supply.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.5
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• pp.335-342
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• 2022

In this paper, a single-bit 3rd-order feedforward delta sigma modulator is proposed for audio applications. The proposed modulator is based on a class-C inverter for low voltage and power applications. For the high-precision requirement, the class-C inverter with regulated cascode structure increases its DC gain and acts as a low-voltage subthreshold amplifier. The proposed Class-C inverter-based modulator is designed and simulated in 180-nm CMOS process. With no performance loss and a low supply voltage compatibility, the proposed class-C inverter-based switched-capacitor modulator achieves high power efficiency. This design achieves an signal-to-noise-and-distortion ratio (SNDR) of 93.9 dB, an signal-to-noise ratio (SNR) of 108 dB, an spurious-free dynamic range (SFDR) of 102 dB, and a dynamic range (DR) of 102 dB at a signal bandwidth of 20 kHz and a sampling frequency of 4 MHz, while only using 280 μW of power consumption from a 0.8-V power supply.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.6A
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• pp.488-498
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• 2005

The DAB(Digital Audio Broadcasting) service which is based on the Eureka-147 of Europe is developed to DMB(Digital Multimedia Broadcasting) service that is divided into Terrestrial DMB and Satellite DMB. The Satellite DMB is a new broadcasting service, which will service multi-channel multimedia broadcasting by the portable receiver or the vehicle receiver. In this paper, we consider that link level performance of satellite DMB system A which is based on the COFDM(Coded Orthogonal Division Multiplexing). It uses the OFDM method which is sensitive to nonlinearity, so we analyze the effect of the HPA(High Power Amplifier) nonlinearity. And then we define the appropriate back-off value by performing the link level simulation considering back-off effect. Also we consider the effect of frequency and time offset, and then confirm the overall link level performance by analyzing and verifying a suitable synchronization method for satellite DMB system A.

• ETRI Journal
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• v.33 no.6
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• pp.897-903
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• 2011

A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8A
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• pp.1169-1178
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• 1999

In this paper, the method to improve audio noise when GMS(Global System of Mobile Communication) is built in HPC(Handheld PC)is provided. The biggest problem with quality of audio is improved by connecting GSM module with wire to the widest erea near by HPC Power Ground to reduce impedance difference, and designing amplifier and earpiece, Result of measurement is satisfied with GSM Acoustic Standard. Standard of GSM Audio is declared in GSM 11.10 ETS 300 607-1. Measuring items corresponds to that standard and B&K Type 6712 is used for measurement. The list of measurement presented in this paper is Sending Sensitivity Frequency Response and SLR, Sending Loudness Rating( SLR level), Receiving Sensitivity Loudness Rating(RLR level), Talker Sidetone(STMR), Stability margin, and Echo Loss(ERL)

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.8A
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• pp.712-719
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• 2012

This paper presents Single-bit Third order Delta-Sigma Modulator, which can be applied to the Low speed High resolution ADC in Audio signal Process System. Whereas the Operational Amplifier in modulator consumed static power dissipation in operating, this modulator used Switching on/off techniques, which makes the Power dissipation of the modulator reduced. Also proposed modulator minimizes frequency characteristic variation by optimizing switch position. And this modulator chooses Single-bit type to guarantee stability. The designed ADC went through 0.35um CMOS n-well 1-poly 4-metal process to be a final product, and the final product has shown 17.1mW of power dissipation with 3.3V of Supply Voltage, 6.4MHz of conversion rate. And 84.3dB SNDR and 13.5bit ENOB with 20KHz of input frequency.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.39-42
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• 2006

a current stress reduction technique for a boost integrated half-bridge (BIHB) DC/DC converter with voltage doubler type rectifier is proposed for digital car audio amplifier application. In the proposed circuit, two external capacitors are added parallel to the rectifier diodes in the secondary side of the transformer to shape the primary and the secondary current like rectangular waveforms in every switching instance. The experimental results of a 200W industrial sample show that the peak primary current decreases about by 10A. Thus, the proposed technique shows improved high efficiency.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.3 s.309
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• pp.51-59
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• 2006

In this paper, we propose an excellent ultrasonic transceiver system based on a QPSK modulation technique for underwater communication. The transmitter sends a still image at the level of 187dB re $1{\mu}Pa/V@1m$ through a power amplifier by driving an ultrasonic sensor. The receiver performs digital conversion at the 100kHz sampling frequency, demodulation and decoding process for the image sent from the transmitter through the underwater communication. We have shown that the processed image at the receiver is almost the same as the orignal one. The maximum detection distance of the system proposed in this paper is approximately 1.17km. To cope with the difficulties of transmission loss, this paper proposes, implements and analyzes important parameters of sensors and circuits used in the system. Most of the underwater communication has focused on the transmission of audio signal, but this paper suggests an efficient underwater communication system for still image transmission.