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http://dx.doi.org/10.7840/kics.2012.37A.8.712

Design of a CMOS Single Bit 3rd Order Delta-Sigma Modulator with Switched Operational Amplifier  

Lee, Han-Ul (인하대학교 아날로그집적회로설계 연구실)
Dai, Shi (인하대학교 아날로그집적회로설계 연구실)
Yoo, Tai-Kyung (인하대학교 아날로그집적회로설계 연구실)
Lee, Keon (인하대학교 아날로그집적회로설계 연구실)
Yoon, Kwang-Sub (인하대학교 전자공학과)
Lee, Sang-Min (인하대학교 전자공학과)
Abstract
This paper presents Single-bit Third order Delta-Sigma Modulator, which can be applied to the Low speed High resolution ADC in Audio signal Process System. Whereas the Operational Amplifier in modulator consumed static power dissipation in operating, this modulator used Switching on/off techniques, which makes the Power dissipation of the modulator reduced. Also proposed modulator minimizes frequency characteristic variation by optimizing switch position. And this modulator chooses Single-bit type to guarantee stability. The designed ADC went through 0.35um CMOS n-well 1-poly 4-metal process to be a final product, and the final product has shown 17.1mW of power dissipation with 3.3V of Supply Voltage, 6.4MHz of conversion rate. And 84.3dB SNDR and 13.5bit ENOB with 20KHz of input frequency.
Keywords
Delta sigma; modulator; CMOS; Switching; Switched OPAmp;
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