• Title/Summary/Keyword: Applications of SoC

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A dual-path high linear amplifier for carrier aggregation

  • Kang, Dong-Woo;Choi, Jang-Hong
    • ETRI Journal
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    • v.42 no.5
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    • pp.773-780
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    • 2020
  • A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

Low-Complexity Deeply Embedded CPU and SoC Implementation (낮은 복잡도의 Deeply Embedded 중앙처리장치 및 시스템온칩 구현)

  • Park, Chester Sungchung;Park, Sungkyung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.3
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    • pp.699-707
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    • 2016
  • This paper proposes a low-complexity central processing unit (CPU) that is suitable for deeply embedded systems, including Internet of things (IoT) applications. The core features a 16-bit instruction set architecture (ISA) that leads to high code density, as well as a multicycle architecture with a counter-based control unit and adder sharing that lead to a small hardware area. A co-processor, instruction cache, AMBA bus, internal SRAM, external memory, on-chip debugger (OCD), and peripheral I/Os are placed around the core to make a system-on-a-chip (SoC) platform. This platform is based on a modified Harvard architecture to facilitate memory access by reducing the number of access clock cycles. The SoC platform and CPU were simulated and verified at the C and the assembly levels, and FPGA prototyping with integrated logic analysis was carried out. The CPU was synthesized at the ASIC front-end gate netlist level using a $0.18{\mu}m$ digital CMOS technology with 1.8V supply, resulting in a gate count of merely 7700 at a 50MHz clock speed. The SoC platform was embedded in an FPGA on a miniature board and applied to deeply embedded IoT applications.

A 16 bit FPGA Microprocessor for Embedded Applications (실장제어 16 비트 FPGA 마이크로프로세서)

  • 차영호;조경연;최혁환
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.7
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    • pp.1332-1339
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    • 2001
  • SoC(System on Chip) technology is widely used in the field of embedded systems by providing high flexibility for a specific application domain. An important aspect of development any new embedded system is verification which usually requires lengthy software and hardware co-design. To reduce development cost of design effort, the instruction set of microprocessor must be suitable for a high level language compiler. And FPGA prototype system could be derived and tested for design verification. In this paper, we propose a 16 bit FPGA microprocessor, which is tentatively-named EISC16, based on an EISC(Extendable Instruction Set Computer) architecture for embedded applications. The proposed EISC16 has a 16 bit fixed length instruction set which has the short length offset and small immediate operand. A 16 bit offset and immediate operand could be extended using by an extension register and an extension flag. We developed a cross C/C++ compiler and development software of the EISC16 by porting GNU on an IBM-PC and SUN workstation and compared the object code size created after compiling a C/C. standard library, concluding that EISC16 exhibits a higher code density than existing 16 microprocessors. The proposed EISC16 requires approximately 6,000 gates when designed and synthesized with RTL level VHDL at Xilinix's Virtex XCV300 FPGA. And we design a test board which consists of EISC16 ROM, RAM, LED/LCD panel, periodic timer, input key pad and RS-232C controller. 11 works normally at 7MHz Clock.

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Query Language Extension and Implementation of MM Presentation System using SMIL in MMDB (멀티미디어 데이터베이스에서 SMIL을 이용한 질의어 확장 및 프리젠테이션 시스템의 구현)

  • 이중화;이종환;유영호;김경석
    • The KIPS Transactions:PartD
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    • v.8D no.1
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    • pp.44-53
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    • 2001
  • It is very important how users query MM data and how the query results are presented in MMDB systems. Also, the query results are represented as the generalized form so as to be used in various applications. In this paper, we propose a generalized method for querying and presenting MM data by extending query language based on presentation elements of SMIUSMIL is W3C recommendation for synchronized MM presentation). Our system provides the query results for users as SMIL format in order to be used for various applications.

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Design and Implementation of Internet Telephony Services (인터넷 텔레포니(VoIP) 서비스의 설계 및 구현)

  • 이종화;강신각
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.9C
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    • pp.842-852
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    • 2002
  • The fast advance in the VoIP technologies gives a rich opportunity to create different kind of VoIP applications such as IP telephony services. The application level call signaling protocols such as ITU-T H.323 and IETF SIP provide the communication functions of end-to-end call setup and release. Currently, there is a lot of H.323 based VoIP products in the market, however SIP is considered as a suitable protocol for supporting applications in IP environments, so SIP based VoIP products and services begin to appear. In this paper, firstly we present the characteristics of some possible SIP based applications and describe the design and implementation of a VoIP example service named PC-to-PC Internet telephony service using the developed SIP network components. The PC-to-PC Internet telephony service and User Agent are developed in MS window 98/2000 using visual C/C++, and Proxy server and Registrar in Linux 7.0 using C, respectively.

Influence of Selenization Pressure on Properties of CIGS Absorber Layer Prepared by RF Sputtering

  • Jung, Sung Hee;Choi, Ji Hyun;Chung, Chee Won
    • Current Photovoltaic Research
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    • v.4 no.3
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    • pp.87-92
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    • 2016
  • The effects of selenization pressure on the structural, optical and electrical properties of the CIGS thin films prepared by RF magnetron sputtering using a single quaternary target were investigated. At selenization pressures lower than atmospheric pressure, CIGS thin films formed non-stoichiometric compounds due to deficiencies of Se vapor. In contrast, when selenization process was conducted at above atmospheric pressure, the residence time of Se vapor inside the tube increased so that the Se element could be incorporated within vacant sites of the CIGS structure, resulting in the formation of stoichiometric CIGS thin films. High quality CIGS thin films could be obtained when the selenization process was performed at pressures greater than atmospheric and $550^{\circ}C$.

Design and Implementation of the RE Module for Sensor Network Applications (센서 네트워크 응용을 위한 무선 통신 모듈 설계 및 구현)

  • Dong, Sung-Soo;Lee, Chong-Ho
    • Journal of Institute of Control, Robotics and Systems
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    • v.12 no.1
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    • pp.60-65
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    • 2006
  • Recently, various ubiquitous networking services are developed and implemented for easy living. In general, new ubiquitous networking services require the new infrastructure including equipments and devices. However, it is difficult to replace existing infrastructure and devices with new ones in the home or office because of cost and maintenance problems. In this paper, we developed small-size web based RF wireless communication systems for sensor network applications. The designed RF systems are implemented using commercial system on a chip (SoC) on existing infrastructure and devices. The developed systems are tested for light control and temperature sensing and they are applied to sensor network training courses for students and engineer as well as various practical applications.

A Development of C-API Mechanism for Open Distributed Computing Systems (개방형 분산 컴퓨팅 시스템에서의 C-API 메타니즘 개발에 관한 연구)

  • 이상기;최용락
    • Journal of the Korea Society of Computer and Information
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    • v.3 no.4
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    • pp.110-119
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    • 1998
  • This paper describes a C-API (Cryptographic-Application program Interface) mechanism that can serve cryptographic service to one or more application programmers in an open distributed computing system. Generic cryptographic service, provides application Programmers with cryptographic algorithms and interfaces which can be shared so that the programmers can program distributed applications containing security services even though they have no detailed knowledge of cryptographic algorithms. Therefore, in this paper, a generic C-API mechanism is designed that can be used independently from various application environments and basic system structures so that programmers can use it commonly. This mechanism has the advantage that allows application programmers be able to use some cryptographic services and key management services not considering of the application program and operating system.

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Improve Stability of Military Infrared Image and Implement Zynq SoC (군사용 적외선 영상의 안정화 성능 개선 및 Zynq SoC 구현)

  • Choi, Hyun;Kim, Young-Min;Kang, Seok-Hoon;Cho, Joong-Hwee
    • IEMEK Journal of Embedded Systems and Applications
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    • v.13 no.1
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    • pp.17-24
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    • 2018
  • Military camera equipment has a problem that observability is inferior due to various shaking factors. In this paper, we propose an image stabilization algorithm considering performance and execution time to solve this problem and implemented it in Zynq SoC. We stabilized both the simple shaking in the fixed observation position and the sudden shaking in the moving observation position. The feature of the input image is extracted by the Sobel edge algorithm, the subblock with the large edge data is selected, and the motion vector, which is the compensation reference, is calculated through template matching using the 3-step search algorithm of the region of interest. In addition, the proposed algorithm can distinguish the shaking caused by the simple shaking and the movement by using the Kalman filter, and the stabilized image can be obtained by minimizing the loss of image information. To demonstrate the effectiveness of the proposed algorithm, experiments on various images were performed. In comparison, PSNR is improved in the range of 2.6725~3.1629 (dB) and image loss is reduced from 41% to 15%. On the other hand, we implemented the hardware-software integrated design using HLS of Xilinx SDSoC tool and confirmed that it operates at 32 fps on the Zynq board, and realized SoC that operates with real-time processing.

The Effect of Catalytic Metal Work Functions and Interface States on the High Temperature SiC-based Gas Sensors (금속 (Pt)과 4H-SiC의 계면상태에 따른 실리콘 카바이드 기반 고온 가스센서 특성 분석)

  • Jung, Ji-Chul;Koo, Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.4
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    • pp.280-284
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    • 2011
  • Silicon carbide (SiC)-based gas sensors can be operated at very high temperatures. So far, catalytic metal-schottky diodes respond fast to a change between a reducing and an oxidizing atmosphere. Therefore SiC diodes have been suggested for high temperature gas sensor applications. In this work, the effect of reactivity of the catalytic surface on the 4H-SiC sensor-structures in 375 K~775 K have been studied and some fundamental simulations have also been performed.