• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.224-225
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• 2007

The Low dielectric properties of epoxy/Annealing $SiO_2$ composites using Annealing new material of nanosized amorphous particles were investigated as function frequency, temperature and filler contents composition. The dielectric constant decrease with increasing frequency and also increase with increasing ambient temperature. The dielectric constant decrease with increase annealing filler contents for epoxy base. The result of x-ray diffraction could obtained single crystal of annealing $SiO_2$ from 500nm amorphous $SiO_2$ powder.

• Transactions on Electrical and Electronic Materials
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• v.15 no.2
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• pp.73-76
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• 2014

$Pt/Al_2O_3/La_2Si_5O_x/SiO_2/Si$ charge trap memory capacitors were prepared, in which the $La_2Si_5O_x$ film was used as the charge trapping layer, and the effects of post annealing atmospheres ($NH_3$ and $N_2$) on their memory characteristics were investigated. $La_2O_3$ nanocrystallites, as the storage nodes, precipitated from the amorphous $La_2Si_5O_x$ film during rapid thermal annealing. The $NH_3$ annealed memory capacitor showed higher charge storage performances than either the capacitor without annealing or the capacitor annealed in $N_2$. The memory characteristics were enhanced because more nitrogen was incorporated at the $La_2Si_5O_x/SiO_2$ interface and interfacial reaction was suppressed after the $NH_3$ annealing treatment.

• Journal of the Korean Ceramic Society
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• v.31 no.11
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• pp.1330-1336
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• 1994

Ta2O5 films were deposited on the p-Si(100) substrates by ECR-PECVD and annealed in O2 atmosphere. The thicknesses of Ta2O5/SiO2 layers were measured by an ellipsometer and a cross-sectional TEM. Annealing in O2 atmosphere enhanced the stoichiometry of the Ta2O5 film and reduced the impurity carbon content. Ta2O5 films were crystallized at the annealing temperatures above 75$0^{\circ}C$. The best leakage current characteristics and the maximum dielectric constant of Ta2O5/SiO2 film capacitor were observed in the specimen annealed at $700^{\circ}C$ and 75$0^{\circ}C$, respectively. The flat band voltage of the Al/Ta2O5/SiO2/p-Si MOS capacitor was varied in the range of -0.6~-1.6 V with the annealing temperature. The conduction mechanism in the Ta2O5 film, the variation of the effective oxide charge density with the annealing temperature, and the effective electric field distribution in the Ta2O5/SiO2 double layer were also discussed.

• Korean Journal of Materials Research
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• v.14 no.4
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• pp.246-250
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• 2004

We have investigated the effects of boron added to Cu film on the Cu-Ti reaction and microstructural evolution of Cu(B) alloy film during annealing of Cu(B)/Ti/$SiO_2$/Si structure. The result were compared with those of Cu(B)/$SiO_2$ structure to identify the effects of Ti glue layers on the Boron behavior and the result grain growth of Cu(B) alloy. The vacuum annealing of Cu(B)/Ti/$SiO_2$ multilayer structure allowed the diffusion of B to the Ti surface and forming $TiB_2$ compounds at the interface. The formed $TiB_2$ can act as a excellent diffusion barrier against Cu-Ti interdiffusion up to $800^{\circ}C$. Also, the resistivity was decreased to $2.3\mu$$\Omega$-cm after annealing at $800^{\circ}C$. In addition, the presence of Ti underlayer promoted the growth Cu(l11)-oriented grains and allowed for normal growth of Cu(B) film. This is in contrast with abnormal growth of randomly oriented Cu grains occurring in Cu(B)/$SiO_2$ upon annealing. The Cu(B)/Ti/$SiO_2$ structure can be implemented as an advanced metallization because it exhibits the low resistivity, high thermal stability and excellent diffusion barrier property.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.3
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• pp.126-134
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• 1996

Tungsten silicide films were deposited on the phosphorus-doped poly-Si/SiO$_{2}$/Si-substrates by LPCVD (low pressue chemical vapor deposition). The formation and various properties of tungsten silicide processed by furnace annealing in N$_{2}$ ambient were evaluated by using XRD. AFM, 4-point probe and SEM. And the redistribution of phosphorus atoms has been observed by SIMS. The crystal structure of the as-deposited tungsten silicide films were transformed from the hexagonal to the tetragonal structure upon annealing at 550.deg. C. The surface roughness of tungsten polycide films were found to very smoothly upon annelaing at 850.deg. C and low phosphorus concentration in polysilicon layer. The sheet resistance of tungsten polycide low phosphorus concentration in polysilicon layer. The sheet resistance of tungsten polycide films are measured to be 2.4 .ohm./ㅁafter furnace annealing at 1100.deg. C, 30min. It was found that the sheet resistance of tungsten polycide films upon annealing above 1050.deg. C were independant on the phosphorus concentration of polysilicon layer and furnace annealing times. An out-diffusion of phosphorus impurity through tungsten silicide film after annealing in $O_{2}$ ambient revealed a remarkably low content of dopant by oxide capping.

• Journal of the Korean Ceramic Society
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• v.35 no.1
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• pp.88-96
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• 1998

The structural and electrical properties of titanium dioxide(TiO2) thin films deposited on p-type (100) si and 4$^{\circ}$off(100) Si substartes by metalorganic chemical vapor deposition (MOCVD) have been studied with post rapid thermal annealing. TiO2 thin films of anatase phase were grown at 300-500$^{\circ}C$ using titanium post rapid thermal annealing at a temperature of 800$^{\circ}C$ for 30sec. rutile phase was observed in the condition of the deposition temperature over 350$^{\circ}C$ in the ambient air atmosphere and at 500$^{\circ}C$ in cacuu,. SEM and AFM study show-ed surface roughness were increased slightly from 40${\AA}$to 55${\AA}$ after annealing due to grain growth and phase transformation. From capacitane-voltage measurement of Al/TiO2./p-Si structure after annealing we obtained ideal capacitance-voltage characteristics of MOS structure with dielectric constant of 16-22 in case of (100) Si and about 30- in case of 4$^{\circ}$off(100) Si but showed the higher leakage current.

• Electrical & Electronic Materials
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• v.7 no.6
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• pp.481-489
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• 1994

The $SnO_2$/(n)Si solar cell was fabricated by electron beam evaporation method, and their properties were investigated. In proportion to increase of substrate and annealing temperature, the conductivity of $SnO_2$ thin film was increased, but its optical transmission decreases because of increasing optical absorption of free electrons in the thin film. $SnO_2$/Si Solar cell characteristics were improved by annealing, but the solar cells was deteriorated by heat treatment above 500[.deg. C]. The optimal outputs of $SnO_2$/Si solar cell through above investigations were $V_{\var}$:350[mV], $J_{sc}$ ;16.53[mA/c $m^{2}$], FF;0.41, .eta.=4.74[%]

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.128-129
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• 2008

The annealing effects of $SiO_2/Si_3N_4$ stacked tunneling dielectrics were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_3N_4/SiO_2/Si_3N_4$(NON), $SiO_2/Si_3N_4/SiO_2$(ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS(Metal-Oxide-Semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field and improved electrical characteristics by annealing processes than $SiO_2$ layer.

• Journal of Convergence for Information Technology
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• v.10 no.8
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• pp.137-143
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• 2020

This study examined the effects of rapid thermal annealing (RTA) on the physical and chemical characteristics of thin silver (Ag) layers on SiO2 coated metal foils. Ag layers were annealed at various temperatures of the range between 150 ℃ and 550 ℃ for 20 min. The surface roughness and resistivity are increased at the annealing temperatures of 550 ℃. We also found that oxygen (O) and silicon (Si) atoms exist at the Ag film surface by using compositional analysis in the annealing temperatures of 550 ℃. The total reflectance is decreased with increasing temperature. These phenomena are due to an out-diffusion of Si atoms from SiO2 layers during the RTA annealing. The results offer the possibility of using it as a substrate for various flexible optoelectronic devices.

• Journal of the Korean institute of surface engineering
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• v.24 no.4
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• pp.196-205
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• 1991

Multi-level thin films are very important in ULSI applications because of their high electromigration resistance. This study presents the effects of titanium, titanium nitride and titanium tungsten underlayers of the stability of multi-aluminum thin films during isothermal annealing. High purity Al(99.999%) films have been electron-beam evaporated on Ti, TiN, TiW films formed on SiO2/Si (P-type(100))-wafer substrates by RF-sputtering in Ar gas ambient. The hillock growth was increased with annealing temperatures. Growth of hillocks was observed during isothermal annealing of the thin films by scanning electron microscopy. The hillock growth was believed to appear due to the recrystallization process driven by stress relaxation during isothermal annealing. Thermomigration damage was also presented in thin films by grain boundary grooving processes. It is shown that underlayers of Al/TiN/SiO2, Al/TiW/SiO2 thin films are preferrable to Al/SiO2 thin film metallization.