• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.1
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• pp.33-38
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• 2008

The probability of an oscillation occurrence in M/W frequency conversion repeaters is low on account of the different operating frequency of the input and output signals. The probability of interference caused by the M/W frequency conversion repeaters to other systems is also low because the systems are used in the line-of-sight. Therefore M/W frequency conversion repeaters are generally used for retransmitting the signal received from base station to the islands. This paper describes the design and implementation of analog predistorter for M/W frequency conversion repeaters in mobile communications. The M/W repeaters convert IF frequency of 1010+/-10MHz to RF frequency of 11GHz. A predistorter can be designed for the M/W repeater operating in either IF or M/W frequency. In this paper IF predistorter operated in 1010MHz is designed and implemented because a M/W predistorter operated in 11GHz is difficult to implement. The IF predistorter can linearize RF modules in the repeater followed by IF stages. The performance test results show that the implemented analog predistorter improves ACPR of 10dB at the output power of 25dBm with the signal frequency of 10.805GHz.

• Journal of Advanced Navigation Technology
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• v.18 no.3
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• pp.229-235
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• 2014

This paper presents the Doherty power amplifier with a digitally controlled analog predistorter circuit of Scintera Corp. to produce high power efficiency and high linearity performance. The analog predistorter improves the linearity performance because of controlling amplitude and phase values of input signal in order to improve intermodulation performance of power amplifier. Also, the power amplifier is designed by the Doherty technology to obtain the high efficiency performance. To validate the Scintera's analog predistorter, we are implemented the power amplifier with Doherty method at center frequency 2150 MHz. Compared with the balanced amplifier, the power amplifier is improved above 11% enhanced efficiency and more than 15 dB ACPR improvement.

• ETRI Journal
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• v.38 no.2
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• pp.227-234
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• 2016

Herein, we demonstrate clipping distortion suppression of directly modulated multi-IF-over-fiber links using a simple shunt diode predistorter. The dynamic range of a directly modulated analog fiber optic link is limited by nonlinear distortions caused by laser-diode clipping. We investigate the link performance in the context of carrie-to-noise and distortion ratio (CNDR) and error vector magnitude (EVM) requirements when supporting LTE-A services. We also design an analog predistorter with a shunt-diode structure, and demonstrate experimentally that the predistorter has the ability to suppress clipping-induced third-order intermodulation distortions of the link by at most 14 dB. It also improves the CNDR and EVM of the 4-IF-multiplexed LTE-A carriers by 7 dB and 2.9%, respectively.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.211-212
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• 2006

This paper represents a Doherty amplifier with analog predistorter to improve the linearity of the Doherty amplifier while preserving the high efficiency. A $3^{rd}$-order predistorter cancels $5^{th}$-order intermodulation (IM5) as well as $3^{rd}$-order intermodulation (IM3) components by their same phase difference in the predistorter and Doherty amplifier. This is accomplished by independently controlling their phase by using the phase-controlled error generator in the predistorter. For experimental verification, a $3^{rd}$-order predistorter has been implemented and tested in a 180-W Doherty amplifier at the wide-band code division multiple access (WCDMA) band. The measured results show good performance with the predistortion Doherty amplifier.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.377-380
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• 2000

In this paper, a new adaptive linearizer architecture with the predistorter is proposed. In the M.Ghaderi's paper, two analog predistorters and an envelope detector are used. Analog circuits for the analog predistorter and the envelope detector can cause imperfection and inaccuracy of the system and make circuits more complex. To solve those problems, most of processes including the predistortion are made by the DSP. The RLS algorithm is applied so that the errors between power amplifier output signals through the postdistorters and predistorted input signals can be converged to the global minimum.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1428-1436
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• 2000

An adaptive predistorter linearizer suitable for the DSP implementation is proposed. Predistortion is performed by the DSP instead of the analog predistorter. RLS algorithm is employed for the optimization process to minimize the errors between the predistorter and postdistorter output signals. Computer simulation results for our linearizer show good performance.

• Proceedings of the Optical Society of Korea Conference
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• 2001.08a
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• pp.258-259
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• 2001

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.78-84
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• 2009

This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LOMaS. From the measured results, at an average output power of 33 dBm(lO-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ${\pm}$5 MHz offset) of below -45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage($V_{DD}$) of 18 V. This compared an ACLR of -36.7 dEc and drain efficiency of 14.1 % at the $V_{DD}$ of 28 V for a PA without APD.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.5
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• pp.802-809
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• 2001

A linear power amplifier for the VHF frequency-hopping(FH) transmitter using an adaptive predistortion linearizer is designed. An analog polynomial linearizer as predistorter is employed. The recursive least square(RLS) algorithm is employed in the optimization process to minimize the errors between the predistorter and postdistorter output signals. Experimental results show that the adjacent channel power of the designed power amplifier is reduced by of 10 dB.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.2 s.314
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• pp.32-38
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• 2007

This paper represents a Doherty amplifier (DPA) with analog predistorter (PD) to improve the linearity of the DPA while preserving the high efficiency. A third-order PD cancels fifth-order intermodulation (IM5) as well as third-order intermodulation (IM3) components by their same phase difference in the PD and DPA. This is accomplished by independently controlling their phase by using the phase-controlled error generator in the PD. Also, we confirm the phase-control ability of the error generator experimentally with a simple and accurate phase measurement setup. For experimental verification, a third-order PD has been implemented and tested in a 180-W DPA at the wide-band code division multiple access (WCDMA) band of 2.11-2.17 GHz. Two-tone test results show that significant cancellation of IM3 and IM5 components can be obtained. For four-carrier WCDMA applications, significant adjacent channel leakage ratio (ACLR) improvement is achieved over a wide range of output power levels. This technique is cost-effective and convenient due to its simple structure, compact size, and three control parameters.