• Title/Summary/Keyword: Analog circuits

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Linearized Transistor Model Based Automated Biasing Scheme for Analog Integrated Circuits

  • Lacek, Matthew;Nahra, Daniel;Roter, Ben;Lee, Kye-Shin
    • Journal of Multimedia Information System
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    • v.8 no.2
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    • pp.143-146
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    • 2021
  • This work presents an automated transistor biasing scheme for analog integrated circuits. In order to effectively bias the transistor at a desired operating point, the proposed method uses a linearized transistor circuit model along with the curve fitted expressions obtained from the pre-simulated I-V characteristics of the actual transistor. As a result, the transistor size that leads to the desired operating point can be easily determined without heavily relying on the circuit simulator, which will lead to significant design time reduction. Furthermore, the proposed method is applied to an actual amplifier circuit where the design time based on the proposed biasing method showed 10× faster than the conventional design approach using the circuit simulator.

A Study on DC Motor Speed Control for Building a Port Cargo Handling Equipment (항만하역장비용 직류전동기의 속도제어에 관한 연구)

  • Ahn, B.Y;Park, J.S.
    • Journal of Korean Port Research
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    • v.11 no.2
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    • pp.273-280
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    • 1997
  • Recently the importance of the cargo handling equipments in a port has been increasing to get strong competition from other ports. Many ports are making efforts to modernize their cargo handling equipments. The kernel technology of such equipments is the speed control of DC motor which is used as an essential part of them. In this paper, we discuss the speed control of a DC motor as a basic work for building cargo handling equipments in a port. DC Motors are still widely used in industrial fields, as driving power motor for electrical fields. DC drives, being easy to control, are widely used in many variable-speed and position control drive system. Traditional analog control circuits used in such applications have many disadvantages. Complex control schemes are difficult to implement with analog components. All these factor and invention of the microprocessor has made it possible to use digital control circuits, using microprocessing system. These digital circuits have been found to be reliable, flexible, and also immune to noise. In this paper it presents the speed control of a SCR DC motor driver which using dual converter by 80c196kc microprocessor. We developed a thyristor power amplifier which does not cause damage thyristor because it is designed to prevent triggering the two SCRs in the same arm simultaneously. And it was analyzed voltage and currents wave at reactive load.

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Embedded RF Test Circuits: RF Power Detectors, RF Power Control Circuits, Directional Couplers, and 77-GHz Six-Port Reflectometer

  • Eisenstadt, William R.;Hur, Byul
    • Journal of information and communication convergence engineering
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    • v.11 no.1
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    • pp.56-61
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    • 2013
  • Modern integrated circuits (ICs) are becoming an integrated parts of analog, digital, and radio frequency (RF) circuits. Testing these RF circuits on a chip is an important task, not only for fabrication quality control but also for tuning RF circuit elements to fit multi-standard wireless systems. In this paper, RF test circuits suitable for embedded testing are introduced: RF power detectors, power control circuits, directional couplers, and six-port reflectometers. Various types of embedded RF power detectors are reviewed. The conventional approach and our approach for the RF power control circuits are compared. Also, embedded tunable active directional couplers are presented. Then, six-port reflectometers for embedded RF testing are introduced including a 77-GHz six-port reflectometer circuit in a 130 nm process. This circuit demonstrates successful calibrated reflection coefficient simulation results for 37 well distributed samples in a Smith chart. The details including the theory, calibration, circuit design techniques, and simulations of the 77-GHz six-port reflectometer are presented in this paper.

Development of A High-Speed Digital Maximum Selector Circuit With Internal Trigger-Signal Generator (내부 트리거 발생회로를 이용한 고속의 디지털 Maximum Selector 회로의 설계)

  • Yoon, Myung-Chul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.2
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    • pp.55-60
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    • 2011
  • Most of neural network chips use an analog-type maximum selector circuit (MS). As the increase of integration level, the analog MS has difficulties in achieving sufficient resolution. Contrary, the digital-type MS is easy to get high resolution but slower than its analog counterparts. A new high-speed digital MS circuit called MSIT (Maximum Selector with Internal Trigger-signal) is presented in this paper. The MSIT has been designed to achieves both the high reliability by using trigger-signals and high speed by removing the unnecessary waiting times. The response time of MSIT is 3.4ns for 32 data with 10-bit resolution in the simulation with 1.2V, $0.13{\mu}m$-process model parameters, which is much faster than its analog counterparts. It shows that digital MS circuits like MSIT can achieve higher speed as well as higher resolution than analog MS circuits.

Implementation of 234.7 MHz Mixed Mode Frequency Multiplication & Distribution ASIC (234.7 MHz 혼합형 주파수 체배 분배 ASIC의 구현)

  • 권광호;채상훈;정희범
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.11A
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    • pp.929-935
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    • 2003
  • An analog/digital mixed mode ASIC for network synchronization of ATM switching system has been designed and fabricated. This ASIC generates a 234.7/46.94 ㎒ system clock and 77.76/19.44 ㎒ user clock using 46.94 ㎒ transmitted clocks from other systems. It also includes digital circuits for checking and selecting of the transmitted clocks. For effective ASIC design, full custom technique is used in 2 analog PLL circuits design, and standard cell based technique is used in digital circuit design. Resistors and capacitors for analog circuits are specially designed which can be fabricated in general CMOS technology, so the chip can be implemented in 0.8$\mu\textrm{m}$ digital CMOS technology with no expensive. Testing results show stable 234.7 ㎒ and 19.44 ㎒ clocks generation with each 4㎰ and 17㎰ of low ms jitter.

Design of a Charge-Redistribution ADC Using Bit Extension (비트 확장을 이용한 전하재분배 방식 ADC의 설계)

  • Kim, Kyu-Chull;Doh, Hyung-Wook
    • Journal of IKEEE
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    • v.9 no.1 s.16
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    • pp.65-71
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    • 2005
  • Physical signals generated in the real world are transformed into electrical signals through sensors and fed into electronic circuits. The electrical signals input to electronic circuits are in analog form, thus they must be converted to digital signals using an ADC(Analog-Digital Converter) for digital processing. Signal processing circuits and ADCs that are to be integrated on a single chip together with silicon micro sensors should be designed to have less silicon area and less power consumption. This paper proposed a charge redistribution ADC which reduces silicon area considerably. The proposed method achieves 8 bit conversion by performing 4-bit conversion twice. It reduced the area of capacitor array, which takes most of the ADC area, by 1/16 when compared to a conventional method. Though it uses twice the number of clocks as a conventional method, it would be appropriate to be integrated with a silicon pressure sensor on a single chip since it does not demand high conversion rate.

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Optimal Design for CMOS Analog Hearing Aid OP Amp Circuit (CMOS 아날로그 보청기 증폭회로의 최적 설계)

  • Jarng Soon-Suck;Chen Lingfeng
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.443-446
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    • 2004
  • Short channel IC circuits become increasingly important in modern high performance electronic systems. In this paper, parts of an analog hearing aid, an amplifier and a regulator, which are implemented with short channel CMOS devices, are designed and optimized in its performance.

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Specification-based Analog and Mixed-signal Circuits Test with Minimal Built-In Hardware Overhead (내장 하드웨어 오버헤드를 최소화한 Specification 기반의 아날로그 및 혼합신호 회로 테스트)

  • Lee, Jae-Min
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.633-634
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    • 2006
  • A new specification-based analog and mixed-signal test technique using high performance current sensors is proposed. The proposed technique using current sensors built in external ATE has little hardware overhead in circuit under test and high testability without time consuming operation of test point placement algorithm.

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Analysis of Frequency Modulation System by Analog Computer Techniques (상사형전자계산기에 의한 주파수변조계통의 해석)

  • 한만춘;변모서
    • 전기의세계
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    • v.16 no.1
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    • pp.14-18
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    • 1967
  • To analyze th frequency modulation system the characteristic equation of the F-M system, i.e., Mathieu's equation, is derived from the equivalent circuits of direct modulation system. The analysis of F-M equation is undertaken by the Yonsei 101 Analog Computer. And the computer solution is compared with the theoretical solution. It is concluded that not only the frequency but also the amplitude of the carrier wave are changed by varying the modulation index and the system becomes unstable if the modulation index is increased near to unity.

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DESIGN AND FUNCTIONAL TEST OF ON-BOARD FLIGHT ANALOG VIDEO SYSTEM

  • Lee Sang-Rae;Kim Sung-Wan;Lee Jae-Deuk
    • Bulletin of the Korean Space Science Society
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    • 2004.10b
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    • pp.308-311
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    • 2004
  • This paper describes design, implementation and functional test of on-board flight analog video system. Video system is the part of the telemetry system as a means of providing flight vehicle's image data. Adopting analog video transmission technique, we could design and test the system in a short time and implement the prototype model with simpler circuits. As results of the functional test, we have made the verification and validation of two cameras' switching in time, and frequency modulation and demodulation of NTSC color signals successfully.

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