• Title/Summary/Keyword: Analog circuit

검색결과 726건 처리시간 0.037초

새로운 상호결합 이득증가형 적분기를 이용한 1.8V 200MHz대역 CMOS 전류모드 저역통과 능동필터 설계 (Design of A 1.8V 200MHz band CMOS Current-mode Lowpass Active Filter with A New Cross-coupled Gain-boosting Integrator)

  • 방준호
    • 전기학회논문지
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    • 제57권7호
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    • pp.1254-1259
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    • 2008
  • A new CMOS current-mode integrator for low-voltage analog integrated circuit design is presented. The proposed current-mode integrator is based on cross-coupled gain-boosting topology. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed current-mode integrator achieves high current gain and unity gain frequency with the same transistor size. As a application circuit of the proposed integrator, we designed the 1.8V 200MHz band current-mode lowpass filter. These are verified by Hspice simulation using $0.18{\mu}m$ CMOS technology.

새로운 리플 아나로그-디지틀 변환기 (A New Ripple Analog - to - Digital Converter)

  • 정원섭
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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    • pp.571-573
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    • 1988
  • A new ripple analog-to-digital converter(ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the input signal in two serial steps. First a coarse conversion is made to determine the most significant bits by the first parallel ADC. The results control a switching network to connect the series resistor segment, the analog signal is contained within, to the second parallel ADC. At second step, a fine conversion is made to determine the least signification bits by the second parallel ADC. The circuit requires 2(2$\frac{N}{2}$) comparators, 2(2$\frac{N}{2}$) resistors, and 2(2$\frac{N}{2}$) switches for N-bit resolution.

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부유게이트 트랜지스터를 이용한 아날로그 연상메모리 설계 (Design of an Analog Content Addressable Memory Implemented with Floating Gate Treansistors)

  • 채용웅
    • 대한전기학회논문지:시스템및제어부문D
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    • 제50권2호
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    • pp.87-92
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    • 2001
  • This paper proposes a new content-addressable memory implemented with an analog array which has linear writing and erasing characteristics. The size of the array in this memory is $2{\times}2$, which is a reasonable structure for checking the disturbance of the unselected cells during programming. An intermediate voltage, Vmid, is used for preventing the interference during programming. The operation for reading in the memory is executed with an absolute differencing circuit and a winner-take-all (WTA) circuit suitable for a nearest-match function of a content-addressable memory. We simulate the function of the mechanism by means of Hspice with 1.2${\mu}m$ double poly CMOS parameters of MOSIS fabrication process.

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디지털 변환신호와 동기화된 클록을 사용하는 아날로그-디지털 변환기 (Analog-to-Digital Conveter Using Synchronized Clock with Digital Conversion Signal)

  • 최진호;장윤석
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2017년도 추계학술대회
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    • pp.522-523
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    • 2017
  • 전류컨베이어 회로와 시간-디지털 변화기를 이용하여 아날로그-디지털 변환기를 설계하였다. 전류컨베이어 회로를 이용하여 아날로그 전압의 크기를 샘플링한 다음, 전류원을 이용하여 샘플링 전압을 방전하면서 아날로그 전압을 시간정보로 변환하였다. 시간정보는 카운터 타입의 시간-디지털 변환기를 이용하여 디지털 값으로 변환되는데 이때 변환 에러를 감소시키기 위해 시간정보 펄스와 동기화된 클록을 생성하여 사용하였다.

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전압 표준용 RSFQ counter회로의 설계 (Circuit design of an RSFQ counter for voltage standard applications)

  • 남두우;김규태;김진영;강준희
    • 한국초전도저온공학회:학술대회논문집
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    • 한국초전도저온공학회 2003년도 추계학술대회 논문집
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    • pp.127-130
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    • 2003
  • An RSFQ (Rapid Single Flux Quantum) counter can be used as a frequency divider that was an essential part of a programmable voltage standard chip. The voltage standard chip is composed of two circuit parts, a counter and an antenna Analog signal of tens to hundreds ㎓ may be applied to a finline antenna part. This analog signal can be converted to the stream of SFQ voltage pulses by a DC/SFQ circuit. The number of voltage pulses can be reduced by 2n times when they pass through a counter that is composed of n T Flip-Flops (Toggle Flip-Flop). Such a counter can be used not only as a frequency divider, but also to build a programmable voltage standard chip. So, its application range can be telecommunication, high speed RAM, microprocessor, etc. In this work, we have used Xic, WRspice, and L-meter to design an RSFQ counter. After circuit optimization, we could obtain the bias current margins of the T Flip-Flop circuit to be above 31% Our RSFQ counter circuit designs were based on the 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology.

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공간벡터 변조법의 아날로그 구현 (Analog Implementation of Space Vector PWM)

  • 이지명;홍명보;이동춘
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1999년도 전력전자학술대회 논문집
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    • pp.299-302
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    • 1999
  • An analog implementation of space vector PWM is proposed in this paper. It is shown that a space vector PWM can be implemented by adding a zero sequency voltage to reference voltage of triangle comparison PWM. The proposed scheme is implemented by six diodes and, an operational amplifier circuit and, a few resistors.

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고속정보 전파특성을 갖는 실시간 비터비 디코더

  • 김종만;신동용;서범수
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 춘계학술대회 논문집
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    • pp.3-3
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    • 2010
  • The Characteristics of Digital Vterbi Decoder utilizing the analog parallel processing circuit technology is proposed. The Analog parallel structure of the viterbi decoder acted by a replacement of the conventional digital viterbi Decoder is progressing fastly. The proposed circuits design han, low distortion, high accuracy over the previous implementation and dynamic programming.

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Virtual ground monitoring for high fault coverage of linear analog circuits

  • Roh, Jeongjin
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권3호
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    • pp.226-232
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    • 2002
  • This paper explains a technique to improve the fault coverage of oscillation-test [1-5] for linear analog circuits. The transient behavior of the virtual ground is monitored during oscillation to extract information of the circuit. The limitation of the oscillation-test is analyzed, and an efficient signature analysis technique is proposed to maximize the fault coverage. The experimental result proves that the parametric fault coverage can be significantly increased by the proposed technique.

Realization of OTA-based CDBA

  • Kaewpoonsuk, Anucha;Petchmaneelumka, Wandee;Kamsri, Thawatchai;Riewruja, Vanchai
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.229-232
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    • 2005
  • This paper presents the OTA-based current differencing buffered amplifier (CDBA), which has a simple configuration comprised four OTAs. The proposed circuit is ease of design and suitable for analog signal processing applications in both voltage and current modes. The first order allpass filters were implemented as the application examples in order to demonstrate the performances of the proposed CDBA. PSPICE analog simulation and the commercially available OTAs-based experimental results verifying the circuit performances are also included.

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상호연관 신경망에 기반을 둔 이동 검출을 위한 아날로그 집적회로 (Analog MOS circuits for motion detection based on correlation neural networks)

  • 심선일;김용태;박정호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(3)
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    • pp.149-152
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    • 2000
  • We propose simple analog MOS circuits producing the one-dimensional compact motion-sensing circuits. In the proposed circuit, the optical flow is computed by a number of local motion sensors which are based on biological motion detectors. Mimicking the structure of biological motion detectors made the circuit structure quite simple, compared with conventional velocity sensing circuits. Extensive simulation results by a simulation program of integrated circuit emphasis (SPICE) indicated that the proposed circuits could compute local velocities of a moving light spot and showed direction selectivity for the moving spot

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