• Title/Summary/Keyword: Analog Digital I/O

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Comparison of the I-V Characteristic as Various Composition ratio of Iodine in a-Se of $BrO_2/a-Se$ based Radiation Conversion Sensor ($BrO_2/a-Se$ 구조의 방사선 변환센서에서 a-Se에 첨가된 조성비 변화에 따른 I-V 특성 비교)

  • Choi, Jang-Yong;Park, Ji-Koon;Gong, Hyun-Gi;Ahn, Sang-Ho;Nam, Sang-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.440-443
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    • 2002
  • Present1y the X-Ray diagnosis system is a real condition that is changing by digital ways in it's existent analog ways. This digital radiation detector is divided by the direct method and the indirect method. The indirect method of applied voltage has special qualities that the resolution is low than direct method by diffusion effect that happens. The conversion process ( radiation${\rightarrow}$visible ray${\rightarrow}$electrical signal of two times, has shortcomings that the energy conversion efficiency of electrical signal is low. The direct method has shortcomings that need strong electric fie1d to detect electrical signal efficiently. This research achieved to develop digital detector of the Hybrid method that have form that mixes two ways to supplement shortcoming of direct. indirect method. A studied electrical characteristic by Iodine's Mixture ratio change is added to selenium in the detector which has a multi-layer structure (Oxybromide + a-Se). There are 8 kinds of Manufactured compositions to amorphous selenium Iodine each 30ppm, 100ppm, 200 ppm, 300ppm, 400ppm, 500ppm, 600ppm, 700ppm by a doped photoconductor through a vacuum thermal evaporation method. The phosphor layer is consisted of Oxybromide ($BrO_2$) which uses optical adhesives multi-layer structure. The manufactured compositions calculates and compares Net Charge and signal to noise ratio measuring Photocurrent about Darkcurrent and X-ray. When doped Iodine Mixture ratio is 500ppm to the multi-layer structure (Oxybromide + a-Se), applied voltage of $3V/{\mu}m$, leakage current of compositions $2.61nA/cm^2$ and net charge value by 764pC/$cm^2$/mR then the best result appeared.

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상부 Au 전극 면적 Size에 따른 PbI2 필름의 전기적 특성 평가

  • Myeong, Ju-Yeon;Park, Jeong-Eun;Kim, Dae-Guk;Kim, Gyo-Tae;Jo, Gyu-Seok;O, Gyeong-Min;Nam, Sang-Hui
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.374-374
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    • 2014
  • 의료용 X-ray는 과거 analog 방식과, 연구가 진행 중이며 현재 많이 사용되고 있는 digital 방식으로 나누어진다. 최근, 광도전체와 형광체 기반의 flat panel X-ray detector의 발전에 따른 상용화가 이루어지고 있으며, 많은 발전 가능성이 제기되고 있다. flat panel X-ray detector 검출방식은 direct method (직접 방식)와 indirect method (간접 방식)로 나누어진다. 본 연구는 일반적으로 상용화 되어있는 amorphous seleinum (비정질 셀레늄)의 큰 일함수에 의한 저 해상력이라는 단점을 보완하기 위해, 작은 일함수를 가지는 물질을 사용하여, 영상을 얻을 시에 높은 해상력으로 표현할 수 있도록 하고, 원자번호가 높은 물질을 사용하여 X-ray 흡수율을 높일 수 있도록 기존 direct method에 많이 사용되고 있는 amorphous seleinum 기반 digital X-ray detector가 아닌, 이러한 장점을 충족시킬 수 있는 PbI2 물질 층을 사용하여 시편을 제작 하였다. PbI2를 같은 두께로 올린 후, 물질 층 상부에 Au 전극 면적을 다른 size로 제작한 시편으로 X-ray에 노출 시켰다. 이는 상부 전극 size 차이에 따른 신호 차이를 측정하여 전기적 특성을 평가하기 위한 것이다. 전도성을 띠고 있는 ITO (Indium - Tin - Oxide) glass를 이용하여 screen printing 방법으로 제작하였다. PbI2층을 약 160~180 um두께, $3cm{\times}3cm$ size로 5개 제작하였으며, 상부 전극으로는 Au를 진공 증착 시켰다. 상부 전극 size는 각각 시편 5개에 $0.5cm{\times}0.5cm$, $1cm{\times}1cm$, $1.5cm{\times}1.5cm$, $2cm{\times}2cm$, $2.5cm{\times}2.5cm$로 PbI2 물질 층 중앙에 증착 시켰다. 이러한 설정으로 X-ray 노출 시 관찰할 수 있는 PbI2의 전기적인 특성을 평가할 수 있었다. 관전압을 40 kVp, 60 kVp, 80 kVp, 100 kVp, 120 kVp, 140 kVp로 설정하고, 관전류는 100 mA로 설정하였으며, Dark current, Sensitivity를 측정하였다. Dark current와 Sensitivity를 측정한 뒤, 그 값을 이용하여 SNR (신호 대 잡음 비)값을 구해보았다.실험 결과 단위면적당 signal과 SNR을 분석할 수 있었다. 80 kVp로 기준을 잡고 결과 값을 보면 $0.5cm{\times}0.5cm$ 시편에서 2.92 nC/cm2, $2.5cm{\times}2.5cm$ 시편에서 0.84 nC/cm2로 상부 전극 크기가 작을수록 더 좋은 신호를 측정할 수 있었다. 똑같은 기준에서 SNR을 계산 해 보았을 때, $0.5cm{\times}0.5cm$ 시편에서 6.46, $2.5cm{\times}2.5cm$ 시편에서 1.91로 SNR역시 상부 전극 크기가 작을수록 더 큰 값을 확인할 수 있었다. 이러한 결과는 edge-effect의 영향으로 인해 나온 결과라고 할 수 있다. 이러한 실험 결과, detector 제작 시, 같은 물질을 사용하여 더 높은 효율을 내기 위해서는 큰 size의 상부 전극 보다는 작은 size의 상부 전극을 증착 시키는 것이 전기적 특성을 더욱 효율적으로 평가할 수 있을 것이라고 사료된다.

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The Development of Industrial Communication Monitoring Board using AVR (AVR을 이용한 산업용 통신 모니터링 보드 개발)

  • Eum, Sang-hee;Lee, Byong-Hoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.6
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    • pp.1177-1182
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    • 2016
  • The most industrial instruments for monitoring and control are occurring the extension problem and the external protocol compatibility. In this paper, we developed the boards for the industrial communication monitoring that are able to convert the protocol in various communication between devices and instruments. These are consisted the main board and several sub-board. They can have extension using the main board connection. The sub-board support the each communication method or data transfer. The main board was used the Atmega 2560 Microprocessor of AVR series, and the sub-boards are have the Atmega 256 or Atmega 128 in the AVR series. We have designed to connect the sub-board using placed the 4 RS485 serial slots in the main board. The sub-boards were developed to support the analog and digital I/O. These are able to have monitoring by CAN and Ethernet communication. The experimental results, we obtained good data transfer rate and conversion rate.

ALTERA Embedded Gigabit Transceiver Measurement for PCI Express Protocol (ALTERA 임베디드 기가비트 트랜시버 테스트)

  • Kwon, Won-Ok;Park, Kyoung;Kwon, Hyuk-Je;Yoon, Suk-Han
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.41 no.4
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    • pp.41-49
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    • 2004
  • In this paper, a design and measurement method for FPGA embedded gigabit-transceiver is presented. Altera's Stratix GX device which is general purpose transceiver called GXB was used for implementing PCI Express transceiver. PCI Express is the generation high performance serial I/O bus used to interconnect peripheral devices. After GXB was set follow by PCI Express specifications, the design has been verified by timing simulation and implemented as hardware. We tested it as follow. First GXB internal digital and analog block test second GXB transmitter signal integrity test called Eye mask test, third GXB high-speed serial I/O buffer and on-chip termination test and the last GXB protocol test. This paper shows all the design and measurement procedure about FPGA embedded gigabit-transceiver.

An optimal Stabilization control Method of a bilinear Induction Motor Model. (쌍선형 유도전동기 모델의 최적 안정화 제어 기법에 관한 연구)

  • Lee, D.K.;Woo, J.I.;Lee, S.H.;Lee, J.T.;Lee, T.G.
    • Proceedings of the KIEE Conference
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    • 1990.07a
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    • pp.433-436
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    • 1990
  • An optimal Stabilization technique for a bilinear in duction model is introduced. This technique includes to o parts; the one is an stabilization control using Lyap unov Function which has the form of a sum of linear and quadratic function of the state variables, and the other is an optimal control using the performance index which depends on the choice of the elements of the Ly apunov matrices concerning both the state variables and the input variables. Therefore, induction motor is drived with the shorter transient time of the state variables and with the smaller overshoot of the ones, simulation results are obtained from a digital computer. Experimental ones are obtained from implementation of the optimizing controller using 8086 microprocessor kits and analog circuits are compared.

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Development of Control System for Anti-Rolling Tank of Ships with Fault Detection Capability (고장진단 기능을 갖는 선박 횡동요 감요 장치 용 제어시스템 개발)

  • Won, Moon-Cheol;Ryu, Sang-Hyun;Choi, Kwang-Sik;Jung, Yun-Ho;Lew, Jae-Moon;Ji, Yong-Jin
    • Journal of Ocean Engineering and Technology
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    • v.24 no.3
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    • pp.64-71
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    • 2010
  • This paper summarizes the development of an ART control system panel with a touch screen and sensors to measure the roll and roll rate of ships. The control system hardware consists of two micro-processors, analog and digital I/O circuits, various relay circuits, etc. Sensor fusion and moving cross algorithms are implemented to accurately estimate the roll angle and roll period. In addition, the control system adopts a fault detection algorithm to inform users of ART system faults. A touch screen in the control panel can display the ART system states and faults. The performance of the developed system was verified on real sea trials.

A Hybrid Audio ${\Delta}{\Sigma}$ Modulator with dB-Linear Gain Control Function

  • Kim, Yi-Gyeong;Cho, Min-Hyung;Kim, Bong-Chan;Kwon, Jong-Kee
    • ETRI Journal
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    • v.33 no.6
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    • pp.897-903
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    • 2011
  • A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

A DLL-Based Multi-Clock Generator Having Fast-Relocking and Duty-Cycle Correction Scheme for Low Power and High Speed VLSIs (저전력 고속 VLSI를 위한 Fast-Relocking과 Duty-Cycle Correction 구조를 가지는 DLL 기반의 다중 클락 발생기)

  • Hwang Tae-Jin;Yeon Gyu-Sung;Jun Chi-Hoon;Wee Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.2 s.332
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    • pp.23-30
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    • 2005
  • This paper describes a DLL(delay locked loop)-based multi-clock generator having the lower active stand-by power as well as a fast relocking after re-activating the DLL. for low power and high speed VLSI chip. It enables a frequency multiplication using frequency multiplier scheme and produces output clocks with 50:50 duty-ratio regardless of the duty-ratio of system clock. Also, digital control scheme using DAC enables a fast relocking operation after exiting a standby-mode of the clock system which was obtained by storing analog locking information as digital codes in a register block. Also, for a clock multiplication, it has a feed-forward duty correction scheme using multiphase and phase mixing corrects a duty-error of system clock without requiring additional time. In this paper, the proposed DLL-based multi-clock generator can provides a synchronous clock to an external clock for I/O data communications and multiple clocks of slow and high speed operations for various IPs. The proposed DLL-based multi-clock generator was designed by the area of $1796{\mu}m\times654{\mu}m$ using $0.35-{\mu}m$ CMOS process and has $75MHz\~550MHz$ lock-range and maximum multiplication frequency of 800 MHz below 20psec static skew at 2.3v supply voltage.

A 16-channel Neural Stimulator IC with DAC Sharing Scheme for Artificial Retinal Prostheses

  • Seok, Changho;Kim, Hyunho;Im, Seunghyun;Song, Haryong;Lim, Kyomook;Goo, Yong-Sook;Koo, Kyo-In;Cho, Dong-Il;Ko, Hyoungho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.5
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    • pp.658-665
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    • 2014
  • The neural stimulators have been employed to the visual prostheses system based on the functional electrical stimulation (FES). Due to the size limitation of the implantable device, the smaller area of the unit current driver pixel is highly desired for higher resolution current stimulation system. This paper presents a 16-channel compact current-mode neural stimulator IC with digital to analog converter (DAC) sharing scheme for artificial retinal prostheses. The individual pixel circuits in the stimulator IC share a single 6 bit DAC using the sample-and-hold scheme. The DAC sharing scheme enables the simultaneous stimulation on multiple active pixels with a single DAC while maintaining small size and low power. The layout size of the stimulator circuit with the DAC sharing scheme is reduced to be 51.98 %, compared to the conventional scheme. The stimulator IC is designed using standard $0.18{\mu}m$ 1P6M process. The chip size except the I/O cells is $437{\mu}m{\times}501{\mu}m$.

Development of the PC Based Color Fish Finder (퍼스널 컴퓨터를 이용한 칼라 어군탐지기의 개발에 관한 연구)

  • 신현옥
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.31 no.3
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    • pp.247-255
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    • 1995
  • This paper describes a personal computer(PC) based color fish finder to improve some problem of the commercial one. The commercial fish finder has no function of the echo data logging and replaying. The authors developed two types of the PC based color fish finder. One is a master type composed of a PC, a digital input-output board, and analog to digital converting (A/D) board and an ultrasonic transceiver unit, the other is a slave type composed of a PC and an A/D board. To test the performances of the master type experiments were carried out in air and in a water tank. It is found that the designed master type fish finder displays very well an eight-colored echogram by one dot resolution to the left side of the PC monitor. Also, the depth of echo signal was corresponds very well to the range from the transducer to a target. The sampling interval of echo signal is about 0.1m and the time of A/D conversion is 30 $\mu$sec. On the other hand, to test the performances of the slave type a raw data of echo signals from a data logger was supplied directly or via RF transceivers to the slave type one. From this experiment, it is confirmed the slave type is useful to replay the echo signal from the data logger or a telesounder.

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