• 제목/요약/키워드: Amorphous silicon films

검색결과 288건 처리시간 0.041초

사이렌 기체속에서 스펏터한 비정질 규소의 성질 (Preparation of Amorphous Silicon by Sputtering in Silane)

  • 김기완
    • 대한전자공학회논문지
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    • 제16권5호
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    • pp.34-41
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    • 1979
  • 도푸안된 n- 또는 P-형 규소표적으로부터 알곤과 사이렌(S1H4) 혼합기체 속에서 스펏터한 결과를 보고한다. 도푸된 박막이 생성되었다. 그러나 도푸효율을 극히 낮았다. 이것은 도판트 원자가 그들 본래의 가(가)에 만족하고 전기적으로 활성이 아니라고 할 수 있겠다. 적외선흡수분광법으로 박막내에 수소가 결합되어 있음을 알 수 있었다. 박막내에서 수소의 결합과 전기적성질사이에 어떤 관계가 있다고는 밝혀지지 않았다.

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ELA를 위한 저수소화 Si 박막의 특성에 관한 연구 (The properties of low hydrogen content silicon thin films for ELA(Excimer Laser Annealing))

  • 권도현;류세원;박성계;남승의;김형준
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 추계학술대회 논문집
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    • pp.476-479
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    • 2000
  • In this study, mesh-type PECVD system was suggested to minimize the hydrogen concentration. The main structural difference between the triode system and a conventional system is that a mesh was attached to the substrate holding electrode. We investigated several conditions to compare with conventional PECVD. The main effect of mesh was to minimize the substrate damage by ion bombardment and to enhance the surface reaction to induce hydrogen desorption. It was also found that hydrogen concentration decreased but deposition rate increased as increasing applied dias. Applied DC bias enhanced sputtering process. Intense ion bombardment causes the weakly bonded hydrogen or hydrogen-containing species to leave the growing film and increased adatom mobility. Furthermore, addition of hydrogen gas enhance the surface diffusion of adatom. The structural properties of poly-Si films were analyzed by scanning electron microscopy(SEM).

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저온 공정에 의한 a-Si:H/c-Si 이종접합 태양전지 제조 및 동작특성 분석 (Process and Performance Analysis of a-Si:H/c-Si Hetero-junction Solar Sells Prepared by Low Temperature Processes)

  • 임충현;이정철;전상원;김상균;김석기;김동섭;양수미;강희복;이보영;송진수;윤경훈
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2005년도 춘계학술대회
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    • pp.196-200
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    • 2005
  • In this work, we investigated simple Aㅣ/TCO/a-Si:H(n)/c-Si(p)/Al hetero-junction solar cells prepared by low temperature processes, unlike conventional thermal diffused c-Si solar cells. a-Si:H/c-Si hetero-junction solar cells are processed by low temperature deposition of n-type hydrogenated amorphous silicon (a-Si:H) films by plasma-enhanced chemical vapor deposition on textured and flat p-type silicon substrate. A detailed investigation was carried out to acquire optimization and compatibility of amorphous layer, TCO (ZnO:Al) layer depositions by changing the plasma process parameters. As front TCO and back contact, ZnO:Al and AI were deposited by rf magnetron sputtering and e-beam evaporation, respectively. The photovoltaic conversion efficiency under AMI.5 and the quantum efficiency on $1cm^2$ sample have been reported. An efficiency of $12.5\%$ is achieved on hetero-structure solar cells based on p-type crystalline silicon.

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Effects of Stress Mismatch on the Electrical Characteristics of Amorphous Silicon TFTs for Active-Matrix LCDs

  • Lee, Yeong-Shyang;Chang, Jun-Kai;Lin, Chiung-Wei;Shih, Ching-Chieh;Tsai, Chien-Chien;Fang, Kuo-Lung;Lin, Hun-Tu;Gan, Feng-Yuan
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.729-732
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    • 2006
  • The effect of stress match between silicon nitride ($SiN_2$) and hydrogenated amorphous silicon (a-Si:H) layers on the electrical characteristics of thin-film transistors (TFTs) has been investigated. The result shows that modifying the deposition conditions of a Si:H and $SiN_2$ thin films can reduce the stress mismatch at a-Si:H/SiNx interface. Moreover, for best a-Si:H TFT characteristics, the internal stress of gate $SiN_2$ layer with slightly nitrogen-rich should be matched with that of a-Si:H channel layer. The ON current, field-effect mobility, and stability of TFTs can be enhanced by controlling the stress match between a-Si:H and gate insulator. The improvement of these characteristics appears to be due to both the decrease of the interface state density between the a-Si:H and SiNx layer, and the good dielectric quality of the bottom nitride layer.

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비정질 실리콘의 결정화를 위한 줄 가열 유도 결정화 공정에 대한 열적 연구 (Thermal Investigation of Joule-Heating-Induced Crystallization of Amorphous Silicon Thin Film)

  • 김동현;박승호;홍원의;노재상
    • 대한기계학회논문집B
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    • 제35권3호
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    • pp.221-228
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    • 2011
  • 대면적 비정질 실리콘 박막의 결정화는 평판 디스플레이 생산에 있어서 핵심 요소로 꼽힌다. 현재 다양한 결정화 기술들이 연구 되고 있으며 그 중 최근에 소개된 줄 가열 유도 결정화는 수십 마이크로초의 짧은 공정 시간, 대면적 결정화 그리고 국부적인 가열로 기판의 열변형 억제 등의 잇점으로 인해 AMOLED 제작에 있어서 기대되는 기술이다. 본 연구에서는 JIC 공정 중 상변화과정에서의 온도를 이론적으로 해석하고 이를 실험과 비교하였다. 이를 통하여 결정화 메커니즘을 결정하는 임계온도를 in-situ 실험과 수치해석을 통해 밝혀내었다.

A Novel Solid Phase Epitaxy Emitter for Silicon Solar Cells

  • 김현호;박성은;김영도;지광선;안세원;이헌민;이해석;김동환
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.480.1-480.1
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    • 2014
  • In this study, we suggest the new emitter formation applied solid phase epitaxy (SPE) growth process using rapid thermal process (RTP). Preferentially, we describe the SPE growth of intrinsic a-Si thin film through RTP heat treatment by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD). Phase transition of intrinsic a-Si thin films were taken place under $600^{\circ}C$ for 5 min annealing condition measured by spectroscopic ellipsometer (SE) applied to effective medium approximation (EMA). We confirmed the SPE growth using high resolution transmission electron microscope (HR-TEM) analysis. Similarly, phase transition of P doped a-Si thin films were arisen $700^{\circ}C$ for 1 min, however, crystallinity is lower than intrinsic a-Si thin films. It is referable to the interference of the dopant. Based on this, we fabricated 16.7% solar cell to apply emitter layer formed SPE growth of P doped a-Si thin films using RTP. We considered that is a relative short process time compare to make the phosphorus emitter such as diffusion using furnace. Also, it is causing process simplification that can be omitted phosphorus silicate glass (PSG) removal and edge isolation process.

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플라즈마 화학기상 증착방식으로 성장시킨 비정질 실리콘 카바이드 박막의 열처리 효과에 관한 특성분석 (Investigation of Annealing Effect for a-SiC:H Thin Films Deposited by Plasma Enhanced Chemical Vapor Deposition)

  • 박문기;김용탁;최원석;윤대호;홍병유
    • 한국전기전자재료학회논문지
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    • 제13권10호
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    • pp.817-821
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    • 2000
  • In this work, we have investigated the dependence of annealing temperature(T$\_$a/) on optical and electrical properties of amorphous hydrogenated SiC(a-SiC:H) films. The a-SiC:H films were deposited on corning glass and p-type Si(100) wafer by PECVD (plasma enhanced vapor deposition) using SiH$_4$+CH$_4$+N$_2$ gas mixture. The experimental results have shown that the optical energy band gap(E$\_$opt/)of the thin films annealed at high temperatures have shown that the graphitization of carbon clusters and micro-crystalline silicon occurs. The current-voltage characteristics have shown good electrical properties at the annealed films.

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Hydrogenation of ZnO:Al Thin Films Using Hot Filament

  • An, Il-Sin;Kim, Ok-Kyung;Lee, Chang-Hyo;Ahn, You-Shin
    • Journal of Korean Vacuum Science & Technology
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    • 제4권3호
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    • pp.86-90
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    • 2000
  • ZnO : Al films were prepared through the optimization process of aluminum content and substrate temperature in rf-magnetron sputtering. When hydrogenation was performed on these films using a hot filament method, all films showed improvement in conductivity although more conductive film showed less improvement. When the substrate temperature ($T_H$) was varied from $25^{\circ}C\;to\;300^{\circ}C$ during hydrogenation, the resistivity was reduced more at higher $T_H$ (more than 30% at $T_H=300^{\circ}C$) Thus, two methods were developed to suppress the dehydrogenation in ZnO : Al films : (1) capping with amorphous silicon thin film as a diffusion barrier, and (2) cooling during hydrogenation.

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유연기판을 이용한 고효율 나노결정질 실리콘 박막 태양전지 제조 (Fabrication of Highly Efficient Nanocrystalline Silicon Thin-Film Solar Cells Using Flexible Substrates)

  • 장은석;김솔지;이지은;안승규;박주형;조준식
    • Current Photovoltaic Research
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    • 제2권3호
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    • pp.103-109
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    • 2014
  • Highly efficient hydrogenated nanocrystalline silicon (nc-Si:H) thin-film solar cells were prepared on flexible stainless steel substrates using plasma-enhanced chemical vapor deposition. To enhance the performance of solar cells, material properties of back reflectors, n-doped seed layers and wide bandgap nc-SiC:H window layers were optimized. The light scattering efficiency of Ag back reflectors was improved by increasing the surface roughness of the films deposited at elevated substrate temperatures. Using the n-doped seed layers with high crystallinity, the initial crystal growth of intrinsic nc-Si:H absorber layers was improved, resulting in the elimination of the defect-dense amorphous regions at the n/i interfaces. The nc-SiC:H window layers with high bandgap over 2.2 eV were deposited under high hydrogen dilution conditions. The vertical current flow of the films was enhanced by the formation of Si nanocrystallites in the amorphous SiC:H matrix. Under optimized conditions, a high conversion efficiency of 9.13% ($V_{oc}=0.52$, $J_{sc}=25.45mA/cm^2$, FF = 0.69) was achieved for the flexible nc-Si:H thin-film solar cells.

폴리이미드 기판에 극저온 Catalytic-CVD로 제조된 니켈실리사이드와 실리콘 나노박막 (Nano-thick Nickel Silicide and Polycrystalline Silicon on Polyimide Substrate with Extremely Low Temperature Catalytic CVD)

  • 송오성;최용윤;한정조;김건일
    • 대한금속재료학회지
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    • 제49권4호
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    • pp.321-328
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    • 2011
  • The 30 nm-thick Ni layers was deposited on a flexible polyimide substrate with an e-beam evaporation. Subsequently, we deposited a Si layer using a catalytic CVD (Cat-CVD) in a hydride amorphous silicon (${\alpha}$-Si:H) process of $T_{s}=180^{\circ}C$ with varying thicknesses of 55, 75, 145, and 220 nm. The sheet resistance, phase, degree of the crystallization, microstructure, composition, and surface roughness were measured by a four-point probe, HRXRD, micro-Raman spectroscopy, FE-SEM, TEM, AES, and SPM. We confirmed that our newly proposed Cat-CVD process simultaneously formed both NiSi and crystallized Si without additional annealing. The NiSi showed low sheet resistance of < $13{\Omega}$□, while carbon (C) diffused from the substrate led the resistance fluctuation with silicon deposition thickness. HRXRD and micro-Raman analysis also supported the existence of NiSi and crystallized (>66%) Si layers. TEM analysis showed uniform NiSi and silicon layers, and the thickness of the NiSi increased as Si deposition time increased. Based on the AES depth profiling, we confirmed that the carbon from the polyimide substrate diffused into the NiSi and Si layers during the Cat-CVD, which caused a pile-up of C at the interface. This carbon diffusion might lessen NiSi formation and increase the resistance of the NiSi.