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Nano-thick Nickel Silicide and Polycrystalline Silicon on Polyimide Substrate with Extremely Low Temperature Catalytic CVD

폴리이미드 기판에 극저온 Catalytic-CVD로 제조된 니켈실리사이드와 실리콘 나노박막

  • Song, Ohsung (Department of Materials Science and Engineering, University of Seoul) ;
  • Choi, Yongyoon (Department of Materials Science and Engineering, University of Seoul) ;
  • Han, Jungjo (Department of Materials Science and Engineering, University of Seoul) ;
  • Kim, Gunil (Department of Materials Science and Engineering, University of Seoul)
  • 송오성 (서울시립대학교 신소재공학과) ;
  • 최용윤 (서울시립대학교 신소재공학과) ;
  • 한정조 (서울시립대학교 신소재공학과) ;
  • 김건일 (서울시립대학교 신소재공학과)
  • Received : 2010.12.30
  • Published : 2011.04.25

Abstract

The 30 nm-thick Ni layers was deposited on a flexible polyimide substrate with an e-beam evaporation. Subsequently, we deposited a Si layer using a catalytic CVD (Cat-CVD) in a hydride amorphous silicon (${\alpha}$-Si:H) process of $T_{s}=180^{\circ}C$ with varying thicknesses of 55, 75, 145, and 220 nm. The sheet resistance, phase, degree of the crystallization, microstructure, composition, and surface roughness were measured by a four-point probe, HRXRD, micro-Raman spectroscopy, FE-SEM, TEM, AES, and SPM. We confirmed that our newly proposed Cat-CVD process simultaneously formed both NiSi and crystallized Si without additional annealing. The NiSi showed low sheet resistance of < $13{\Omega}$□, while carbon (C) diffused from the substrate led the resistance fluctuation with silicon deposition thickness. HRXRD and micro-Raman analysis also supported the existence of NiSi and crystallized (>66%) Si layers. TEM analysis showed uniform NiSi and silicon layers, and the thickness of the NiSi increased as Si deposition time increased. Based on the AES depth profiling, we confirmed that the carbon from the polyimide substrate diffused into the NiSi and Si layers during the Cat-CVD, which caused a pile-up of C at the interface. This carbon diffusion might lessen NiSi formation and increase the resistance of the NiSi.

Keywords

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