• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1050-1053
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• 2002

In this paper, Amorphous silicon on glass substrate was recrystallized to poly-crystalline silicon by solid phase crystallization (SPC) technology. The active region of thin film transistor (TFT) was fabricated by amorphous silicon. The output and transfer characteristics of thin film transistor with lightly doped drain (LDD) structure was measured and analyzed. As a results, analyzed TFTs reliability with LDD's length by various kinds argument such as sub-threshold swing coefficient, mobility and threshold voltages were evaluated. Stress effects in TFT were able to improve to the characteristics of turn-on current and hot carrier effects by LDD's length variations.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.185-188
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• 2002

In this paper, Amorphous silicon on glass substrate was recrytallized to poly-crystalline silicon by solid phase crystallization(SPC) technology The active region of thin film transistor(TFT) was fabricated by amorphous silicon. The output and transfer characteristics of thin film transistor with lightly doped drain(LDD) structure was measured and analyzed. As a results, analyzed TFT's reliability with LDD's length by various kinds argument such as sub-threshold swing coefficient, mobility and threshold voltages were evaluated. Stress effects in TFT were able to improve to the characteristics of turn-on current and hot carrier effects by LDD's length variations

• 한국표면공학회지
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• 제43권1호
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• pp.7-11
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• 2010

Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.

• 한국결정성장학회지
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• 제20권6호
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• pp.254-261
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• 2010

본 연구에서는 다결정 실리콘 태양전지 응용을 위한 다결정 실리콘 씨앗층의 제조와 그의 특성에 관한 연구를 수행하였다. 다결정 실리콘 씨앗층은 glass/Al/$Al_2O_3$/a-Si 구조를 이용하여 aluminum-induced layer exchange(ALILE) 고정으로 제조하였으며, 자연산화막부터 50 nm까지 다양한 크기로 $Al_2O_3$ 막두께를 변화시켜 알루미늄 유도 결정화 공정에서 막의 두께가 결정화 특성 및 결정결함, 결정크기에 미치는 영향에 대하여 조사하였다. 연구결과, ALILE 공정으로 생성된 다결정 실리콘막의 결함은 $Al_2O_3$ 막의 두께가 증가할수록 함께 증가한 반면, 결정화 정도와 결정입자의 크기는 $Al_2O_3$막의 두께가 증가할수록 감소하였다. 본 실험에서는 16 nm 두께 이하의 앓은 $Al_2O_3$ 막의 구조에서 평균 약 $10\;{\mu}m$ 크기의 sub-grain 결정립을 얻었으며, 결정성은 <111> 방향의 우선 배향성 특성을 보였다.

• Journal of Information Display
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• 제10권3호
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• pp.117-120
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• 2009

A new crystallization method for amorphous silicon, called selective area heating (SAH), was proposed. The purpose of SAH is to improve the reliability of amorphous silicon films with extremely low thermal budgets to the glass substrate. The crystallization time shortened from that of the conventional solid-phase crystallization method. An isolated thin heater for SAH was fabricated on a quartz substrate with a Pt layer. To investigate the crystalline properties, Raman scattering spectra were used. The crystalline transverse optic phonon peak was at about 519 $cm^{-1}$, which shows that the films were crystallized. The effect of the crystallization time on the varying thickness of the $SiO_2$ films was investigated. The crystallization area in the 400nm-thick $SiO_2$ film was larger than those of the $SiO_2$ films with other thicknesses after SAH at 16 W for 2 min. The results show that a $SiO_2$ capping layer acts as storage layer for thermal energy. SAH is thus suggested as a new crystallization method for large-area electronic device applications.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1514-1516
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• 1999

This paper covers our efforts to improve the low carrier mobility and light instability of hydrogenated amorphous silicon (a-Si:H) films with microcrystalline silicon $({\mu}c-Si)$ films. We successfully prepared ${\mu}c-Si$ films on $CaF_2$/glass substrate by decomposition of $SiH_4$ in RPCVD system. The $CaF_2$ films on glass served as a seed layer for ${\mu}c-Si$ film growth. The XRD analysis on $CaF_2$/glass illustrated a (111) preferred $CaF_2$ grains with the lattice mismatch less than 5 % of Si. We achieved ${\mu}c-Si$ films with a crystalline volume fraction of 61 %, (111) and (220) crystal orientations. grain size of $706\AA$, activation energy of 0.49 eV, and Photo/dark conductivity ratio of 124. By using a $CaF_2$/glass structure. we were able to achieve an improved ${\mu}c-Si$ films at a low substrate temperature of $300^{\circ}C$.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2001년도 추계학술발표회 초록집
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• pp.68-68
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• 2001

Thin films of polycrystalline silicon (poly-Si) is a promising material for use in large-area electronic devices. Especially, the poly-Si can be used in high resolution and integrated active-matrix liquid-crystal displays (AMLCDs) and active matrix organic light-emitting diodes (AMOLEDs) because of its high mobility compared to hydrogenated _amorphous silicon (a-Si:H). A number of techniques have been proposed during the past several years to achieve poly-Si on large-area glass substrate. However, the conventional method for fabrication of poly-Si could not apply for glass instead of wafer or quartz substrate. Because the conventional method, low pressure chemical vapor deposition (LPCVD) has a high deposition temperature ($600^{\circ}C-1000^{\circ}C$) and solid phase crystallization (SPC) has a high annealing temperature ($600^{\circ}C-700^{\circ}C$). And also these are required time-consuming processes, which are too long to prevent the thermal damage of corning glass such as bending and fracture. The deposition of silicon thin films on low-cost foreign substrates has recently become a major objective in the search for processes having energy consumption and reaching a better cost evaluation. Hence, combining inexpensive deposition techniques with the growth of crystalline silicon seems to be a straightforward way of ensuring reduced production costs of large-area electronic devices. We have deposited crystalline poly-Si thin films on soda -lime glass and SiOz glass substrate as deposited by PVD at low substrate temperature using high power, magnetron sputtering method. The epitaxial orientation, microstructual characteristics and surface properties of the films were analyzed by TEM, XRD, and AFM. For the electrical characterization of these films, its properties were obtained from the Hall effect measurement by the Van der Pauw measurement.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1998년도 IUMRS-ICEM ABSTRACT BOOK
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• pp.68.3-68
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• 1998

• 태양에너지
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• 제8권1호
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• pp.68-73
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• 1988

In the glass/TCO/p-i-n a-Si/Al type of amorphous silicon solar cell, the effects on solar cell efficiency and metastability for the various kinds of TCO analyzed by SAM and ESCA, which was used to measure the diffusion profiles of In and Sn and the Fermi energy shifts in the TCO/p interface respectively. Indium which diffused into a-Si p-layer did not have any significant effects on the Fermi level shift of p-layer when the content of $B_2H_6/SiH_4$ in p-layer was at 1 gas%. The cell fabricated on $SnO_2$ turned out to have the best cell photovoltaic characteristics. ITO fabricated by electron beam deposition system, which was shown to have the greatest rate of diffusion of Indium in ITO/p interface produced the worst metastability among the cells tested.

• Journal of Information Display
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• 제2권3호
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• pp.72-77
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• 2001

Amorphous silicon thin-film transistors (a-Si TFTs) were incorporated into Mo-tip-based triode-type field emitters and diode-type ones of carbon nanotubes for an active-matrix cathode (AMC) plate of field emission displays. Also, we developed a novel surface-treatment process for the Mo-tip fabrication, which gleatly enhanced in the stability of field emission. The field emission currents of AMC plates on glass substrate were well controlled by the gate bias of a-Si TFTs. Active-matrix field emission displays (AMFEDs) with these AMC plates were demonstrated in a vacuum chamber, showing low-voltage matrix addressing, good stability and reliability of field emission, and highly uniform light emissions from the anode plate with phosphors. The optimum design of AMFEDs including a-Si TFTs and a new light shield/focusing grid is discussed.