• Journal of the Korean Crystal Growth and Crystal Technology
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• v.30 no.6
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• pp.271-276
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• 2020

In this study, an amorphous SiC block was manufactured using polycarbosilane (PCS), an organosilicon polymer. The dense SiC blocks were easily fabricated in various shapes via pyrolysis at 1100℃, 1200℃, 1300℃, 1400℃ after manufacturing a PCS molded body using cured PCS powder. Physical and chemical properties were analyzed using a thermogravimetric analyzer (TGA), scanning electron microscope (SEM), energy dispersive spectroscopy (EDS), and universal testing machine (UTM). The prepared SiC block was decomposed into SiO and CO gas as the temperature increased, and β-SiC crystal grains were grown in an amorphous structure. In addition, the density and flexural strength were the highest at 1.9038 g/㎤ and 6.189 MPa of SiC prepared at 1100℃. The manufactured amorphous silicon carbide block is expected to be applicable to other fields, such as the previously reported microwave assisted heating element.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1455-1458
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• 2008

Amorphous silicon (a-Si:H) thin-film transistors (TFTs) are fabricated on flexible organic polymer foil substrates. As-fabricated performance, electrical bias-stability at elevated temperatures, electrical response under mechanical flexing, and prolonged mechanical stability of the TFTs are studied. TFTs made on plastic at ultra low process temperatures of $150^{\circ}C$ show initial electrical performance like TFTs made on glass but large gate-bias stress instability. An abnormal saturation of the instability against operation temperature is observed.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• Journal of Powder Materials
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• v.22 no.1
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• pp.15-20
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• 2015

The composite of porous silicon (Si) and amorphous carbon (C) is prepared by pyrolysis of a nano-porous Si + pitch mixture. The nano-porous Si is prepared by mechanical milling of magnesium powder with silicon monoxide (SiO) followed by removal of MgO with hydrochloric acid (etching process). The Brunauer-Emmett-Teller (BET) surface area of porous Si ($64.52m^2g^{-1}$) is much higher than that before etching Si/MgO ($4.28m^2g^{-1}$) which indicates pores are formed in Si after the etching process. Cycling stability is examined for the nano-porous Si + C composite and the result is compared with the composite of nonporous Si + C. The capacity retention of the former composite is 59.6% after 50 charge/discharge cycles while the latter shows only 28.0%. The pores of Si formed after the etching process is believed to accommodate large volumetric change of Si during charging and discharging process.

• Journal of the Korean Vacuum Society
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• v.4 no.S2
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• pp.64-68
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• 1995

Silicon films were deposited at $430^{\circ}C$ by remote plasma chemical vapor deposition(RPECVD) with a gas mixture of $Si_2H_6/SiF_4/H_2$. The silicon films deposited without and with $SiF_4$ were characterized using atomic force microscopy(AFM), transmission electron microscopy(TEM) and X-ray diffraction(XRD). Both silicon films have the same rugged surface morphology, but, the silicon film deposited with $SiF_4$ exhibits more rugged. The silicon film deposited without $SiF_4$ is amorphous, whereas the silicon film deposited with $SiF_4$ is polycrystalline with very small needle-like grains which are perpendicular to the substrate and uniformly distributed in the thickness of the film. The silicon film deposited with $SiF_4$ was found to have a preferred orientation along the growth direction with the<110> of the film parallel to the <111> of the substrate. The effect of $SiF_4$ during RPECVD was discussed.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1019-1021
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• 1995

Light induced degradation of hydrogenated amorphous silicon(a-Si:H) are related to the number of weak dangling bonds which are thought to be responsible for the Staebler-Wronski effects, and caused the many photoelectric problems in applications of thin film transistors and solar cell, etc. In this paper, we deposited fluorinated amorphous silicon films(a-Si:H;F) with $SiH_4$ and $SiF_4$ gas mixture and investigated the effects of fluorine atoms on the evoluations of the crystallinity and improvements of light instability. We have found that micro-crystallinity produced in a-SI:H;F films and marked maximum value of 22% at the flow rate of $SiH_4:SiF_4$=2:10 sccm by UV spectrophotometer measurement, while n-Si:H film deposited with only $SiH_4$ gas showed no crystallinity. Light-induced degradation property of a-Si:H;F films is also improved which is mainly due to the etching effects of fluorine atoms on the weak Si-Si bonds and unstable hydrogen bonds. It is considered that involving fluorine atoms in a-Si:H films may contribute to the suppression of light-induced degradation and evolution of micro-crystallinity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.2
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• pp.95-100
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• 2000

For the well-controlled growing in-situ heavily phosphorus doped polycrystalline Si films directly on Si wafer by reduced pressure chemical vapor deposition, a study is made of the two step growth. When in-situ heavily phosphorus doped Si films were deposited directly on Si (100) wafer, crystal structure in the film is not unique, that is, the single crystal to polycrystalline phase transition occurs at a certain thickness. However, the well-controlled polycrtstalline Si films deposited by two step growth grew directly on Si wafers. Moreover, the two step growth, which employs crystallization of grew directly on Si wafers. Moreover, the two step growth which employs crystallization of amorphous silicon layer grown at low temperature, reveals crucial advantages in manipulating polycrystal structures of in-situ phosphorous doped silicon.

• Journal of Information Display
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• v.5 no.2
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• pp.1-5
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• 2004

We developed an a-Si TFT-LCD panel with integrated gate driver circuit using a standard 5-MASK process. To minimize the effect of the a-Si TFT current and LC's capacitance variation with temperature, we developed a new a-Si TFT circuit structure and minimized coupling capacitance by changing vertical architecture above gate driver circuit. Integration of gate driver circuit on glass substrate enables single chip and 3-side free panel structure in a-Si TFT-LCD of QVGA ($240{\times}320$) resolution. And using double ASG structure the dead space of TFT-LCD panel could be further decreased.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.36 no.10
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• pp.1019-1023
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• 2012

In this research, a novel direct-aluminum-heating-induced crystallization method was developed for the purpose of application to solar cells. By applying a constant current of 3 A to an aluminum thin film, a 200-nm-thick amorphous silicon (a-Si) thin film with a size of $1cm{\times}1cm$ can be crystallized into a polycrystalline silicon (poly-Si) thin film within a few tens of seconds. The Raman spectrum analysis shows a peak of 520 $cm^{-1}$, which verifies the presence of poly-Si. After removing the aluminum layer, the poly-Si thin film was found to be porous. SIMS analysis showed that the porous poly-Si thin film was heavily p-doped with a doping concentration of $10^{21}cm^{-3}$. Thermal imaging shows that the crystallization from a-Si to poly-Si occurred at a temperature of around 820 K.

• Korean Journal of Metals and Materials
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• v.47 no.5
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• pp.322-329
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• 2009

60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.