• 한국결정성장학회지
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• 제30권6호
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• pp.271-276
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• 2020

본 연구에서는 유기 규소 폴리머(organosilicon polymer)인 폴리카보실란(polycarbosilane, PCS)을 사용하여 비정질 탄화규소 블록을 제조를 진행하였다. 다양한 형상의 치밀한 탄화규소 블록은 큐어링된 PCS 미세분말을 일축가압성형기를 통해 2~8 ton 하중을 가한 후 1100℃, 1200℃, 1300℃, 1400℃의 열처리 과정을 거쳐 제조되었으며, 물리적 화학적 특성 분석을 위해 열중량분석기(TGA), 주사전자현미경(SEM), 에너지분광분석법(EDS), 만능시험기(UTM)을 이용하였다, 제조된 탄화규소 성형체는 열분해 온도가 증가함에 따라 SiO와 CO 가스로의 분해가 발생하였고, 비정질의 구조에서 β-SiC 결정입자가 성장함을 보였다. 또한, 밀도와 굴곡강도는 1100℃의 열분해 온도에서 제조된 탄화규소 성형체가 1.9038 g/㎤과 6.189 MPa으로 가장 높았다. 제조된 비정질 탄화규소 블록은 이전에 보고된 마이크로파 도움 발열체와 같이 다른 분야에 적용 가능할 것으로 기대된다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1455-1458
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• 2008

Amorphous silicon (a-Si:H) thin-film transistors (TFTs) are fabricated on flexible organic polymer foil substrates. As-fabricated performance, electrical bias-stability at elevated temperatures, electrical response under mechanical flexing, and prolonged mechanical stability of the TFTs are studied. TFTs made on plastic at ultra low process temperatures of $150^{\circ}C$ show initial electrical performance like TFTs made on glass but large gate-bias stress instability. An abnormal saturation of the instability against operation temperature is observed.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• 한국분말재료학회지
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• 제22권1호
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• pp.15-20
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• 2015

The composite of porous silicon (Si) and amorphous carbon (C) is prepared by pyrolysis of a nano-porous Si + pitch mixture. The nano-porous Si is prepared by mechanical milling of magnesium powder with silicon monoxide (SiO) followed by removal of MgO with hydrochloric acid (etching process). The Brunauer-Emmett-Teller (BET) surface area of porous Si ($64.52m^2g^{-1}$) is much higher than that before etching Si/MgO ($4.28m^2g^{-1}$) which indicates pores are formed in Si after the etching process. Cycling stability is examined for the nano-porous Si + C composite and the result is compared with the composite of nonporous Si + C. The capacity retention of the former composite is 59.6% after 50 charge/discharge cycles while the latter shows only 28.0%. The pores of Si formed after the etching process is believed to accommodate large volumetric change of Si during charging and discharging process.

• 한국진공학회지
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• 제4권S2호
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• pp.64-68
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• 1995

Silicon films were deposited at $430^{\circ}C$ by remote plasma chemical vapor deposition(RPECVD) with a gas mixture of $Si_2H_6/SiF_4/H_2$. The silicon films deposited without and with $SiF_4$ were characterized using atomic force microscopy(AFM), transmission electron microscopy(TEM) and X-ray diffraction(XRD). Both silicon films have the same rugged surface morphology, but, the silicon film deposited with $SiF_4$ exhibits more rugged. The silicon film deposited without $SiF_4$ is amorphous, whereas the silicon film deposited with $SiF_4$ is polycrystalline with very small needle-like grains which are perpendicular to the substrate and uniformly distributed in the thickness of the film. The silicon film deposited with $SiF_4$ was found to have a preferred orientation along the growth direction with the<110> of the film parallel to the <111> of the substrate. The effect of $SiF_4$ during RPECVD was discussed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1019-1021
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• 1995

Light induced degradation of hydrogenated amorphous silicon(a-Si:H) are related to the number of weak dangling bonds which are thought to be responsible for the Staebler-Wronski effects, and caused the many photoelectric problems in applications of thin film transistors and solar cell, etc. In this paper, we deposited fluorinated amorphous silicon films(a-Si:H;F) with $SiH_4$ and $SiF_4$ gas mixture and investigated the effects of fluorine atoms on the evoluations of the crystallinity and improvements of light instability. We have found that micro-crystallinity produced in a-SI:H;F films and marked maximum value of 22% at the flow rate of $SiH_4:SiF_4$=2:10 sccm by UV spectrophotometer measurement, while n-Si:H film deposited with only $SiH_4$ gas showed no crystallinity. Light-induced degradation property of a-Si:H;F films is also improved which is mainly due to the etching effects of fluorine atoms on the weak Si-Si bonds and unstable hydrogen bonds. It is considered that involving fluorine atoms in a-Si:H films may contribute to the suppression of light-induced degradation and evolution of micro-crystallinity.

• 한국전기전자재료학회논문지
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• 제13권2호
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• pp.95-100
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• 2000

For the well-controlled growing in-situ heavily phosphorus doped polycrystalline Si films directly on Si wafer by reduced pressure chemical vapor deposition, a study is made of the two step growth. When in-situ heavily phosphorus doped Si films were deposited directly on Si (100) wafer, crystal structure in the film is not unique, that is, the single crystal to polycrystalline phase transition occurs at a certain thickness. However, the well-controlled polycrtstalline Si films deposited by two step growth grew directly on Si wafers. Moreover, the two step growth, which employs crystallization of grew directly on Si wafers. Moreover, the two step growth which employs crystallization of amorphous silicon layer grown at low temperature, reveals crucial advantages in manipulating polycrystal structures of in-situ phosphorous doped silicon.

• Journal of Information Display
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• 제5권2호
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• pp.1-5
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• 2004

We developed an a-Si TFT-LCD panel with integrated gate driver circuit using a standard 5-MASK process. To minimize the effect of the a-Si TFT current and LC's capacitance variation with temperature, we developed a new a-Si TFT circuit structure and minimized coupling capacitance by changing vertical architecture above gate driver circuit. Integration of gate driver circuit on glass substrate enables single chip and 3-side free panel structure in a-Si TFT-LCD of QVGA ($240{\times}320$) resolution. And using double ASG structure the dead space of TFT-LCD panel could be further decreased.

• 대한기계학회논문집B
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• 제36권10호
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• pp.1019-1023
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• 2012

본 연구에서는 새로운 알루미늄 유도 결정화 공정을 제안하였다. 알루미늄 박막에 직접 3 A의 정전류를 인가하여 $1cm{\times}1cm$ 넓이의 두께 200 nm 비정질 실리콘 박막을 수십 초 내에 결정화하는 방법이다. 결정화된 다결정 실리콘 박막은 520 $cm^{-1}$ 에서의 라만 분광 피크를 통해 확인할 수 있었다. 공정 후, 알루미늄이 식각된 다결정 실리콘 박막은 다공성 구조임을 SEM 을 통하여 확인할 수 있었다. 또 한, 이차이온질량분석(secondary ion mass spectroscopy)에서 알루미늄 농도가 $10^{21}cm^{-3}$으로 헤비 도핑된 것을 확인 할 수 있었으며, 실시간으로 측정된 열화상 카메라의 결과를 통해 결정화는 820 K 근처에서 일어나는 것을 확인할 수 있었다.

• 대한금속재료학회지
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• 제47권5호
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• pp.322-329
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• 2009

60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.