• Title/Summary/Keyword: Amorphous Si

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Amorphous Silica in Soil Silt (토양 실트의 비정질 실리카)

  • Jeong, Gi Young
    • Journal of the Mineralogical Society of Korea
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    • v.31 no.4
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    • pp.287-293
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    • 2018
  • Amorphous silica ($SiO_2$) silt grains were found in some soils of Korean Peninsula. Scanning electron microscopy of polished section of soils revealed ellipsoidal amorphous $SiO_2$ grains with numerous submicron pores concentrated in the interior. Their amorphous structure was confirmed by lattice imaging and electron diffraction under transmission electron microscope. Amorphous $SiO_2$ grains were not found in the eolian sediment of the Chinese loess plateau. Although the origin of the amorphous $SiO_2$ grain is uncertain, they are likely either phytolith or weathering product of volcanic ash. The amorphous $SiO_2$ silt grains are not useful as a tracer of long-range transport mineral dust in soils.

Electrical Properties of MOS Capacitors and Transistors with in-situ doped Amorphous Si Gate (증착시 도핑된 비정질 Si 게이트를 갖는 MOS 캐패시터와 트랜지스터의 전기적 특성)

  • 이상돈;이현창;김재성;김봉렬
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.6
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    • pp.107-116
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    • 1994
  • In this paper, The electrical properties of MOS capacitors and transistoras with gate of in-situ doped amorphous Si and poly Si doped by POCI$_3$. Under constant current F-N stress, MOS capacitors with in-situ doped amorphous Si gate have shown the best resistance to degradation in reliabilty properties such as increase of leakage current, shift of gate voltage (V$_{g}$). shift of flat band voltage (V$_{fb}$) and charge to breakdown(Q$_{bd}$). Also, MOSFETs with in-situ doped amorphous Si gate have shown to have less degradation in transistor properties such as threshold voltage, transconductance and drain current. These improvements observed in MOS devices with in-situ doped amorphous Si gate is attributed to less local thinning spots at the gate/SiO$_2$ interface, caused by the large grain size and the smoothness of the surface at the gate/SiO$_2$ interface.

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Application of 532 nm YAG-Laser Annealing to Crystallization of Amorphous Si Thin Films Deposited on Glass Substrates

  • Lee, Jong-Won;So, Byung-Soo;Chung, Ha-Seung;Hwang, Jin-Ha
    • Korean Journal of Materials Research
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    • v.18 no.3
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    • pp.113-116
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    • 2008
  • A 532 nm Nd-YAG laser was applied to crystallize amorphous Si thin films in order to evaluate the applicability of a Nd-YAG laser to low-temperature polycrystalline Si technology. The irradiation of a green laser was controlled during the crystallization of amorphous Si thin films deposited onto glass substrates in a sophisticated process. Raman spectroscopy and UV-Visible spectrophotometry were employed to quantify the degree of crystallization in the Si thin films in terms of its optical transmission and vibrational characteristics. The effectiveness of the Nd-YAG laser is suggested as a feasible alternative that is capable of crystallizing the amorphous Si thin films.

Deposition and Photoluminescence Characteristics of Silicon Carbide Thin Films on Porous Silicon (다공성실리콘 위의 탄화규소 박막의 증착 및 발광특성)

  • 전희준;최두진;장수경;심은덕
    • Journal of the Korean Ceramic Society
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    • v.35 no.5
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    • pp.486-492
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    • 1998
  • Silicon carbide (SiC) thin films were deposited on the porous silicon substrates by chemical vapour de-position(CVD) using MTS as a source material. The deposited films were ${\beta}$-SiC with poor crystallity con-firmed by XRD measurement. It was considered that the films showed the mixed characteistics of cry-stalline and amorphous SiC where amorphous SiC where amorphous SiC played a role of buffer layer in interface between as-dep films and Si substrate. The buffer layer reduced lattice mismatch to some extent the generally occurs when SiC films are deposited on Si. The low temperature (10K) PL (phtoluminescence) studies showed two broad bands with peaks at 600 and 720 for the films deposited at 1100$^{\circ}C$ The maximum PL peak of the crystalline SiC was observed at 600 nm and the amrophous SiC of 720 nm was also confirmed. PL peak due the amorphous SiC was smaller than that of the crystalline SiC, PL of porous Si might be disapperared due to densification during heat treatment.

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Characterization of Poly-Si TFT's using Amorphous-$Si_xGe_y$ for Seed Layer (Amorphous-$Si_xGe_y$을 seed layer로 이용한 Poly-Si TFT의 특성)

  • Jung, Myung-Ho;Jung, Jong-Wan;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.125-126
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    • 2007
  • Polycrystalline silicon thin-film-transistors (Poly-Si TFT's) with a amorphous-$Si_xGe_y$ seed layer have been fabricated to improve the performance of TFT. The dependence of crystal structure and electrical characteristics on the the Ge fractions in $Si_xGe_y$ seed layer were investigated. As a result, the increase of grain size and enhancement of electrical characteristics were obtained from the poly-Si TFT's with amorphous-SixGey seed layer.

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Effects of Sintering Additives on the Microstructure Development in Silicon Oxynitride Ceramics

  • Kim, Joosun;Chen, I-Wei
    • The Korean Journal of Ceramics
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    • v.6 no.3
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    • pp.224-228
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    • 2000
  • Using a small amount of additives and amorphous Si₂N₂O powders, O-SiAlON ceramics have been hot-pressed and its microstructure and mechanical properties were investigated. Scandium oxide was demonstrated to be an effective densification additive for O-SiAlON. Amorphous Si₂N₂O was densified at relatively low temperatures and a microstructure with acicular grains was developed. Fine grains found in materials obtained from amorphous powders suggest that nucleation and crystallization of O-SiAlOH is relatively easy compared with the Si₃N₄-SiO₂reaction.

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Characteristics of $Si^+$ self implant Induced Damage and Its Annealing Behavior ($Si^+$ 이온주입된 Si 기판의 결함형성 및 회복에 관한 연구)

  • ;;;;;;Hiroshi Kuwano
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.8
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    • pp.91-99
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    • 1994
  • Damage induced by Si ion implantation and its annealing behavior during rapid thermal annealing were investigated by cross-sectional TEM (transmission electron microscopy) and RB ( Rutherford backscattering) spectrum. 150keV and 50keV Si ions were implanted in Si (100) at room temperature with doses of 2${\times}10^{15}cm^{-2}$. And 100keV Si ions were implanted in Si with doses from 1${\times}10^{14}cm^{-2}$. A variety of damage structures were generated by Si ion implantation such as continuous amorphous layer extending to the surface buried amorphous layer and damage clusters. Damage clusters are annealed out at the lower annealing temperature of 550 $^{\circ}C$. However, event at the temperature of 110$0^{\circ}C$ end of range loops remain in the original lower amorphous/crystal interface in the case of continuous and buried amorphous layer formation. Extended defects in the shape of zipper dislocations are also observed at the middle of the recrystallized region in the buried amorphous layer.

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Characterization of Amorphous In-Si-O Multilayer for Low Emissivity Applications (로이 응용을 위한 비정질 In-Si-O 다층구조 특성 평가)

  • Lee, Young Seon;Lee, Sang Yeol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.8
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    • pp.483-485
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    • 2014
  • Transparent amorphous In-Si-O (ISO)/Ag/In-Si-O (ISO) has been reported for low emissivity (low-e) applications. Effective Si doping into the $In_2O_3$ matrix led to a completely amorphous ISO film as well as a low resistivity and a high optical transmittance. The optical and electrical performances were examined by measuring transmittance with a UV-VIS spectrophotometer and resistivity with a Hall effect measurement. Consequently, low-e glass with ISO/Ag/ISO showed a high transparency in the visible region and low emissivity in the infrared region, indicating that ISO is a promising amorphous transparent electrode for low-e glass.

Hydrogen-Dependent Catalytic Growth of Amorphous-Phase Silicon Thin-Films by Hot-Wire Chemical Vapor Deposition (HWCVD를 이용한 Amorphous Si 박막 증착공정에서 수소량에 따른 박막성장 특성)

  • Park, Seungil;Ji, Hyung Yong;Kim, MyeongJun;Kim, Keunjoo
    • Current Photovoltaic Research
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    • v.1 no.1
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    • pp.27-32
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    • 2013
  • We investigated the growth mechanism of amorphous-phase Si thin films in order to improve the film characteristics and circumvent photo-degradation effects by implementation of hot-wire chemical vapor deposition. Amorphous silicon thin films grown in a silane/hydrogen mixture can be decomposed by a resistive heat filament. The structural properties were observed by Raman spectroscopy, FTIR, SEM, and TEM. The electrical properties of the films were measured by photo-conductivity, dark-conductivity, and photo-sensitivity. The contents of Si-H and $Si-H_n$ bonds were measured to be 19.79 and 9.96% respectively, at a hydrogen flow rate of 5.5 sccm, respectively. The thin film has photo-sensitivity of $2.2{\times}10^5$ without a crystalline volume fraction. The catalyst behavior of the hot-wire to decompose the chemical precursors by an electron tunneling effect depends strongly on the hydrogen mixture rate and an amorphous Si thin film is formed from atomic relaxation.

Direct Current (DC) Bias Stress Characteristics of a Bottom-Gate Thin-Film Transistor with an Amorphous/Microcrystalline Si Double Layer

  • Jeong, Tae-Hoon;Kim, Si-Joon;Kim, Hyun-Jae
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.5
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    • pp.197-199
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    • 2011
  • In this paper, the bottom-gate thin-film transistors (TFTs) were fabricated with an amorphous/microcrystalline Si double layer (DL) as an active layer and the variations of the electrical characteristics were investigated according to the DC bias stresses. Since the fabrication process of DL TFTs was identical to that of the conventional amorphous Si (a-Si) TFTs, it creates no additional manufacturing cost. Moreover, the amorphous/microcrystalline Si DL could possibly improve stability and mass production efficiency. Although the field effect mobility of the typical DL TFTs is similar to that of a-Si TFTs, the DL TFTs had a higher reliability with respect to the direct current (DC) bias stresses.