• Title/Summary/Keyword: ATM Switch Architecture

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The Design of Knockout Switch Structure For Improving Performance of Inter- Processor Communication in Mobile Communication System. (이동통신시스템의 프로세서간 통신성능향상을 위한 넉아웃 스위치의 구조설계)

  • Park, Sang-Gyu;Kim, Jae-Hong;Lee, Sang-Jo
    • The Transactions of the Korea Information Processing Society
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    • v.3 no.7
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    • pp.1868-1879
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    • 1996
  • There are limitations to process high bandwidth traffic in B-ISDN with mesh- topology single bus architecture of current mobile communication system. And, it is impossible to import ATM switch using fixed length packet rather than variable length packet. Some implementations are able to process variable length packet, but there are some problems such as pre-processing for synchronization and bit delay. In this paper, we design a concentrator that can manipulate variable length packet without additional pre-process. There is on bit delay for packet starting signal in input interface, So it is more efficient to process packets, such that the concentrator can reduce he processing time as $\ulcornerlog2N\lrcorne+1$ bit-time rather than N bit-time delay in ordinary concentrator. It is expected that the mobile communication system with partial mesh topology bus adopting the knockout switch architecture can process high bandwidth traffic in B-ISDN.

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Mobile ATM: A Generic and flexible network infrastructure for 3G mobile services

  • Jun Li;Roy Yates;Dipankar Raychaudhuri
    • Journal of Communications and Networks
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    • v.2 no.1
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    • pp.35-45
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    • 2000
  • this paper presents the concept of "mobile ATM', a proposal for third-generation (3G) mobile communication network infrastructure capable of supporting flexible evolution of radio technologies from today's cellular and data services towards future wireless multimedia services. Mobile ATM provides generic mobility management and QoS-based transport capabilities suitable for integration of multiple radio access technologies including cellular voice. wireless data, and future broadband wireless services. The architecture of a mobile ATM network is outlined in terms of the newly-defined "W-UNI" interface at the radio link and "M-UNI"and "M-UNI" interface which supports unified access for WATM and non-ATM mobile terminals through corresponding interworking functions (IWF) is explained. leading to an understanding of how different radio access technologies are supported by the same ATM-based core network infrastructure. Generic mechanisms for handoff and location management within the core mobile network are discussed. and related protocol extensions over the "W-UNI" and "M-UNI/NNI"interfaces are proposed. the issue of "crossover switch (COS)" selection in mobile ATM is considered, and a unified handoff signaling syntax which supports flexibility in COS selection is described. Typical signaling sequences for call connection and handoff using the proposed protocols are outlined. Experimental results form a proof-of-concept mobile ATM network prototype are presented in conclusion.

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A Study on the Design of Switch for High Speed Internet Communication Network (고속 인터넷 통신망을 위한 스위치 설계에 관한 연구)

  • 조삼호
    • Journal of Internet Computing and Services
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    • v.3 no.3
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    • pp.87-93
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    • 2002
  • A complex network and a parallel computer are made up of interconnected switching units. The role of a switching unit is to set up a connection between an input port and an output port, according to the routing information. We proposed our switching network with a remodeled architecture is a newly modified Banyan network with eight input and output ports. We have analysed the maximum throughput of the revised switch. Our analyses have shown that under the uniform random traffic load, the FIFO discipline is limited to 70%, The switching system consists of an input control unit, a switch unit and an output control unit. Therefore the result of the analyses shows that the results of the networking simulation with the new switch are feasible and if we adopt the new architecture of the revised model of the Banyan switch, the hardware complexity can be reduced. The FIFO discipline has increased by about 11% when we compare the switching system with the input buffer system. We have designed and verified the switching system in VHDL using Max+plusII. We also designed our test environment including micro computers, the base station, and the proposed architecture. We proposed a new architecture of the Banyan switch for BISDN networks and parallel computers.

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Fault Management in Crossbar ATM Switches (크로스바 ATM 스위치에서의 장애 관리)

  • Oh Minseok
    • The KIPS Transactions:PartC
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    • v.12C no.1 s.97
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    • pp.83-96
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    • 2005
  • The multichannel switch is an architecture widely used for ATM (Asynchronous Transfer Mode). It is known that the fault tolerant characteristic can be incorporated into the multichannel crossbar switching fabric. For example, if a link belonging to a multichannel group fails, the remaining links can assume responsibility for some of the traffic on the failed link. On the other hand, if a fault occurs in a switching element, it can lead to erroneous routing and sequencing in the multichannel switch. We investigate several fault localization algorithm in multichannel crossbar ATM switches with a view to early fault recovery. The optimal algorithm gives the best performance in terms of time to localization but it is computationally complex which makes it difficult to implement. We develop an on-line algorithm which is computationally more efficient than the optimal one. We evaluate its performance through simulation. The simulation results show that the Performance of the on-line algorithm is only slightly sub-optimal for both random and bursty traffic. There are cases where the proposed on-line algorithm cannot pinpoint down to a single fault. We enumerate those cases and investigate the causes. Finally, a fault recovery algorithm is described which utilizes the information provided by the fault localization algorithm The fault recovery algorithm providesadditionalrowsandcolumnstoallowcellstodetourthefaultyelement.

A contention resolution scheme based on the buffer occupancy for th einput-buffer ATM switch (버퍼의 점유도에 기초한 입력버퍼 ATM 스위치의 경합제어 방식)

  • 백정훈;박제택
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.34S no.1
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    • pp.36-42
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    • 1997
  • This paper proposes a high-speed contention resolution scheme featuring high flexibility to the bursty traffic for an input buffering ATM switching architecture and its hardware strategy. The scheme is based on the threshold on the occupancy of the input buffer. As the proposed scheme utilizes the threshold, it has high flexibility to the fluctuations of the input traffic. The hardware strategy for the proposed policy is provided with the aim of the simple structure that achieves the reduction of the signal path and the power consumption. The performance on the average buffer size of the proposed policy is performed and compared with the conventional schame under the bursty traffic through both the analysis based on the markov hain and the simulation. The relations among the parameters on the proposed policy is analyzed to improve the performance.

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Design and Performance Evaluation of a 3-Dimensional Nonblocking Copy Network for Multicast ATM Switches (ATM 멀티캐스트 스위치를 위한 3차원 논블럭킹 복사망의 설계 및 성능평가)

  • 신재구;손유익
    • Journal of KIISE:Information Networking
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    • v.29 no.6
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    • pp.696-705
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    • 2002
  • This paper presents a new copy network for multicast ATM switches. Many studies have been carried out up to date since the proposition of Lee's copy network. However, the overflows and cell conflicts within the switch have still been raised a problem in argument. In order to reduce those problems, we proposed a 3-dimensional multicast switching architecture which has shared buffers in this paper. The proposed architecture can reduce the overflows and cell conflicts through multiple paths and output ports even in the high load environments. Also, we proposed a cell splitting algorithm which handles the cell in the case of large fan-out, and a copy network to increase throughput by expanding the Lee's Broadcast Banyan Network(BBN). Cell copy uses the Boolean interval splitting algorithm and the multicast pattern of the cells according to the self-routing characteristics of the network. In the proposed copy network, we improve the problems such as overflow, cell splitting of large fanout, cell conflicts, etc., which were still existed in the Lee's network. The results of performance evaluation by computer simulation show that the proposed scheme has better throughput, cell loss rate and cell delay than the conventional method.

The Implementation of Multi-Port UTOPIA Level2 Controller for Interworking ATM Interface Module and MPLS Interface Module (MPLS모듈과 ATM모듈과의 Cell Mode 인터페이스를 위한 Multi-Port지원 UTOPIA-L2 Controller구현)

  • 김광옥;최병철;박완기
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.11C
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    • pp.1164-1170
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    • 2002
  • In the ACE2000 MPLS system, MPLS Interface Module(MIM) is composed of an ATM Interface Module and a HFMA performing a packet forwarding. In the MIM, the HFMA RSAR receive cells from the Physical layer and reassemble the cells. And the IP Lookup controller perform a packet forwarding after packet classification. Forwarded packet is segmented into cells in the HFMA TSAR and transfer to the ALMA for the transmission to an ATM cell switch. When the MIM make use of an ATM Interface Module, it directly connect the ALMA with a PHY layer using the UTOPIA Level2 interface. Then, an ALMA performs Master Mode. Also, the HFMA TSAR performs the Master Mode in the MIM. Therefore, the UTOPIA-L2 Controller of the Slave Mode require for interfacing between an ALMA and a HFHA TSAR. In this paper, we implement the architecture and cell control mechanism for the UTOPIA-L2 Controller supporting Multi-ports.

Optical Switching Architectures using WDM for High-Speed ATM Networks (고속 ATM망을 위한 파장 분할 광교환기 구조)

  • So, W.H.;Lee, C.H.;Kim, Y.S.;Kim, Y.C.
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.8
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    • pp.12-20
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    • 1998
  • All-optical networks(AON) are emerging as the next generation broadband networks for wide-area and local-area networks. Many optical switch architectures are currently proposed to realize AON. Specially, optical switches using WDM have a lot of advantages in point of the optical transparency and network topology for B-ISDN services in AON. In this paper, two kinds of Knockout Optical Switching Architectures(KOSA) are proposed for high speed optical ATM networks. We use WDM technologies for them to operate in all-optical area and they are called Architecture-Ⅰ, Architecture-Ⅱ respectively. Each one represents different characteristics according to the number of components and the kind of components, which make KOSA have different performance and system complextity. In order to verify and to compare the performance, these architectures were analyzed and simulated in terms of cell loss ratio, system complexity and buffering speed.

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Perfomence comprison of various input-buffered ATM switch architectures under random and bursty traffic (랜덤 프래픽과 버스티 트래픽 환경에서 ATM 입력 버퍼링 스위치 최대 수율 향상 방식들의 성능 비교 및 분석)

  • 손장우;이현태;이준호;이재용;이상배
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.5
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    • pp.1184-1195
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    • 1998
  • In this paper, we compare vaious input-buffered ATM switch architectures in structures on input buffer and switching fabric, the resons for performance improvement and degradation, arbitration scheme and maximum throughput, and present comparative merits and demerits of each architecture under random and bursty traffic. We also analyze the prformance of combined architectures of windowing scheme, destination-queueing based input-port expansion schemeand output-port expansion scheme, and show that it is possible to achieve 100% throughput with combined scheme of destination-queueing based input-port expansion scheme and output-port expansio scheme when the number of output group is 2 and output port expansion ratio is 2.

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Design of Switching Fabric Supporting Variable Length Packets (가변 길이 패킷을 지원하는 스위칭 패브릭의 설계)

  • Ryu, Kyoung-Sook;Kim, Mu-Sung;Choe, Byeong-Seog
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.3
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    • pp.311-315
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    • 2008
  • The switching fabric used to make high speed switching for packet transfer between input and output interface in recent internet environments. Without making any changes in order to remain ATM switching fabric, the existing structures should split/reassemble a packet to certain size, set aside cross-point buffer and will put loads on the system. In this paper, we proposed a new switch architecture, which has separated data memory plane and switching plane packet data will be stored on the separate memory structure and simultaneously only the part of the memory address pointers can pass the switching fabric. The small mini packets which have address pointer and basic information would be passed through the switching fabric. It is possible to achieve the remarkable switching performance than other switch fabrics with contending variable length packets.