• 대한전자공학회논문지SD
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• 제37권2호
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• pp.38-45
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• 2000

광연결 시스템의 SPICE 모델링과 이를 이용한 시스템 성능 분석에 관한 연구를 수행하였다. 먼저, 광소자의 등가회로 모델을 구현하고, 송·수신단의 회로를 설계하여 안정적인 SPICE 시뮬레이션 결과를 얻었다. SPICE 시뮬레이션 결과로 eye 다이어그램을 얻을 수 있고, 이를 토대로 BER을 계산할 수 있었다. 바이어스 조건에 따라서 turn-on 지연으로 인한 jitter 현상을 볼 수 있고, 전송율, BER, 송신단의 전력 소모, 바이어스 조건의 상호 관계를 통해 시스템의 최적화를 이룰 수 있다. 광연결 시스템의 SPICE를 이용한 최적화 방법은 Gigabit Ethernet, ATM등의 응용 분야에서 LD 구동회로와 수신단의 회로 설계에 유용하게 쓰일 것으로 기대된다.

• 한국식품저장유통학회지
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• 제7권1호
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• pp.124-131
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• 2000

Antibacterial activities of powdered spices(garlic , ginger, cinnamon and clove) against pathogenic Escherichia coli )157:H7 and Staphyloccus auresus were investigated. Spice powder was added in was exponetial phase of each bacterial culture . Growth inhibition was determined by the absorbance at 660nm and morphological changes of the cells were observed by transmission electron microscope (TEM). Ginger powder has the highest antibacterial activity, following cinnamon , clove and garlic has the least activity.Growth of Escherichia coli O157:H7 and Staphyloccus aureus were completely inhibited within 5 hours after addition of 1 % of garlic , 0.3% of ginger or cinnamon , 0.5% of clove powder on the exponential phase of the cells. Spice untreated cells of E. coli and S. aureus, the cytoplasm was entirely surrounded by rigid cell wall and cell walls formed a smooth layer well attached to the plasma membrane. In the cells of E. coli and S. aureus treated with spice powder, cell wall and plasma membrane were lysed and severely damaged. E.coli cells growth in the presence of spice powder showed plammolysis, the loss of electron dense material, the formation of extra cellular blebs and cytoplasm burst out from the cell. S .sureus cells grown in the presence of spice powder showed swell of cell wall, the loss of electron dense material , coagulation of cell cytoplasm and formation of extra cellular blebs. Severely damaged cells of S. aureus lost whole cytoplasm and left as ghost of the cell. Spice powder stimulated autolyssi and induced cell death.

• 센서학회지
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• 제24권5호
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• pp.353-357
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• 2015

A new SPICE-compatible model for a gate/body-tied PMOSFET photodetector (GBT PD) with an overlapping control gate is presented. The proposed SPICE-compatible model of a GBT PD with an overlapping control gate makes it possible to control the photocurrent. Research into GBT PD modeling was proposed previously. However, the analysis and simulation of GBT PDs is not lacking. This SPICE model concurs with the measurement results, and it is simpler than previous models. The general GBT PD model is a hybrid device composed of a MOSFET, a lateral bipolar junction transistor (BJT), and a vertical BJT. Conventional SPICE models are based on complete depletion approximation, which is more applicable to reverse-biased p-n junctions; therefore, they are not appropriate for simulating circuits that are implemented with a GBT PD with an overlapping control gate. The GBT PD with an overlapping control gate can control the sensitivity of the photodetector. The proposed sensor is fabricated using a $0.35{\mu}m$ two-poly, four-metal standard complementary MOS (CMOS) process, and its characteristics are evaluated.

• 전기학회논문지
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• 제65권3호
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• pp.439-444
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• 2016

The method for extracting the SPICE model parameter of Schottky diode under DC forward bias is proposed. A method for improving the accuracy of the SPICE model parameter at various temperatures is proposed. Three analysis steps according to the magnitude of the current is used in order to extract the parameters effectively. At each analysis step, initial parameters are calculated by using the current-voltage equations and the Levenberg-Marquardt analysis is proceeded. To verify the validity of the proposed method, the SPICE model parameters for the BAT45 and FSV1045 under DC forward bias is extracted. Schottky diode currents obtained from the proposed method shows the average relative error of 6.1% and 9% compared with the measured data for the BAT45 and FSV1045 sample at various temperatures.

• 반도체디스플레이기술학회지
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• 제16권3호
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• pp.71-77
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• 2017

As the automobile industry has shifted to software, the Automotive SPICE standard has been established to ensure efficient product development process and quality. In the assessment model, the HIS Scope is the minimum standard for small and medium automotive electric companies to meet OEM requirements. However, in order to achieve the HIS Scope, the output of each process stage that meets the verification criteria of Automotive SPICE must be created. In particular, the test phase takes a lot of resources, which is a big burden for small and medium-sized companies. In this paper, we propose a methodology for creating test cases of software integration test phase based on UML sequence diagram, which is a software design phase of Automotive SPICE HIS Scope, by applying behavior model based testing method. We also propose a tool chain for automating the creation process. This will reduce the resources required to create a test case.

• 한국정보통신학회논문지
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• 제21권8호
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• pp.1465-1470
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• 2017

기존의 MOSFET에서는 반전층보다 항상 실리콘 두께가 크기 때문에 드레인유도 장벽감소가 실리콘 두께에 관계없이 산화막 두께 및 채널길이의 함수로 표현되었다. 그러나 10 nm 이하 저도핑 이중게이트 구조에서는 실리콘 두께 전체가 공핍층이 형성되기 때문에 기존의 SPICE 모델을 사용할 수 없게 되었다. 그러므로 이중게이트 MOSFET에 대한 새로운 SPICE 용 드레인유도 장벽감소 모델을 제시하고자 한다. 이를 분석하기 위하여 전위분포와 WKB 근사를 이용하여 열방사 및 터널링 전류를 구하였다. 결과적으로 드레인유도 장벽감소는 상하단 산화막 두께의 합 그리고 실리콘 두께의 2승에 비례하며 채널길이의 3승에 반비례한다는 것을 알 수 있었다. 특히 SPICE 파라미터인 정적 궤환계수가 1과 2사이에서 사용할 수 있어 합당한 파라미터로써 사용할 수 있었다.

• Journal of Electrical Engineering and Technology
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• 제8권5호
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• pp.1182-1187
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• 2013

Transient radiation is emitted during a nuclear explosion and causes fatal errors as upset and latch-up in CMOS circuits. This paper proposes the transient radiation SPICE models of NMOS, PMOS, and INVERTER based on the transient radiation analysis using TCAD (Technology Computer Aided Design). To make the SPICE model of a CMOS circuit, the photocurrent in the PN junction of NMOS and PMOS was replaced as current source, and a latch-up phenomenon in the inverter was applied using a parasitic thyristor. As an example, the proposed transient radiation SPICE model was applied to a CMOS NAND circuit. The CMOS NAND circuit was simulated by SPICE and TCAD using the 0.18um CMOS process model parameter. The simulated results show that the SPICE results were similar to the TCAD simulation and the test results of commercial CMOS NAND IC. The simulation time was reduced by 120 times compared to the TCAD simulation.

• 전기학회논문지
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• 제58권9호
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• pp.1769-1774
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• 2009

An algorithm for extracting the BJT DC model parameter values for SPICE model is proposed. The nonlinear optimization method for analyzing the device I-V data using the Levenberg-Marquardt algorithm is proposed and the method for calculating initial conditions of model parameters to improve the convergence characteristics is proposed. The base current and collector current obtained from the proposed method shows the root mean square error of 6.04% compared with the measured data of the PNP BJT named 2SA1980.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2006년도 춘계학술대회 논문집
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• pp.230-232
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• 2006

본 논문은 Spice해석을 이용하여 push-pull inverter 방식의 전자식 안정기회로를 해석하고 안정기를 설계 제작하였다. Spice 시뮬레이션을 사용함으로서 전자식 안정기의 설계에 있어서 전기적 특성을 예측, 평가 할 수 있었고 이를 바탕으로 145W저압 UV램프용 전자식 안정기를 개발하였다.

• 한국전자파학회논문지
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• 제29권7호
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• pp.560-565
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• 2018

기존에 제안된 SPICE(Sparse Iterative Covariance-based Estimation) 알고리즘은 시간영역에서 구현되며 공분산 행렬에 sparse recovery 기법을 적용함으로써 표적 방위각을 추정한다. 본 논문은 기존의 시간영역에서 다루던 SPICE 알고리즘을 주파수 영역으로 확장함으로써 주파수 영역에서도 구현 가능함을 보여준다. 또한 기존의 주파수 영역 표적 방위각 추정 알고리즘의 성능에 비하여 제안된 알고리즘의 성능이 우수함을 보여준다.