• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.7 s.337
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• pp.71-78
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• 2005

A K-Best algerian is known as optimal for implementing the maximum-likelihood detector (MLD), since it has a fixed maximum complexity compared with the sphere decoding or the maximum-likelihood decoding algorithm. However the computational complexity of the K-Best algrithm is still prohibitively high for practical applications when K is large enough. If small value of K is used, the maximum complexity decreases but error flooring at high SNR is caused by error propagation. In this paper, a K-reduction scheme, which reduces K according to each search level, is proposed to solve error propagation problems. Simulations showed that the proposed scheme provides the improved performance in the bit error rate and also reduces the average complexity compared with the conventional scheme.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.42 no.6
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• pp.49-56
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• 2005

An electron microbeam system has been developed to investigate the biological effect of cells by irradiating cell-nuclei with low-energy and low-flux electrons. It is essential to discern the cell nucleus from its cytoplasm and the culture medium and to locateit exactly onto the beam exit. The irradiation speed at more than 10,000 cells per hour is another requisite for the observations on cellular response to have good statistics. Long-time labor with patience and high concentration is needed since the frames of $320{\times}240{\mu}m^2$ should be moved more than 500 times for irradiating more than 10,000 cells per an hour. This paper describes the electron microbeam system with a focus on the user interfaces concerning the process of automatically recognizing the cell nuclei and injecting electron beam into the target cell nuclei at the irradiation speed of more than 10,000 cell nuclei per hour.

• Restorative Dentistry and Endodontics
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• v.28 no.5
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• pp.363-368
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• 2003

The purpose of this study is to evaluate the effect of additional enamel etching with phosphoric acid on the microleakage of the adhesion of self-etching primer system. Class V cavity($4mm{\times}3mm{\times}1.5mm$) preparations with all margins in enamel were prepared on buccal surface of 42 extracted human upper central incisor teeth. Prepared teeth were randomly divided into 3 groups. Group 1：no additional pretreatment with 37% phosphoric acid (NE). Group 2：additional pretreatment with 37% phosphoric acid for 10 seconds (E10s). Group 3：additional pretreatment with 37% phosphoric acid for 20 seconds (E20s). The adhesives(Clearfil SE $Bond^{\circledR}$, Kuraray, Osaka, Japan) and composite resins(Clearfil $AP-X^{\circledR}$, Osaka, Kuraray, Japan) were applied following the manufacturer's instructions. All the specimens were finished with the polishing disc(3M dental product, St Paul, MN, USA), thermocycled for 500 cycles between $5^{\circ}C$ and $55^{\circ}C$ and resected apical 3-mm root. 0.028 stainless steel wire was inserted apically into the pulp chamber of each tooth and sealed into position with sticky wax. Surrounding tooth surface was covered with a nail varnish 2 times except areas 1mm far from all the margins. After drying for one day, soaked the samples in the distilled water. Microleakage was assessed by electrochemical method(System 6514, $Electrometer^{\circledR}$), Keithley, USA) in the distilled water. In this study, the microleakage was the lowest in group 1 (NE) and the highest in group 3(E20s)(NE

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.447-447
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• 2010

일찍이 $SiO_2$ (Silicon dioxide) 박막은 다양한 분야에서 유전층, 부식 방지층, passivation층 등의 역할을 해왔다. 그리고 이러한 박막 공정은 대부분 진공의 환경에서 그 공정이 이루어지고 있다. 하지만 이러한 진공 system은 chamber, loadlock 그리고 펌프 등의 다양한 진공장비로 인한 생산 비용 증가, 공정의 복잡성뿐만 아니라 공정의 대면적화에 어려움을 지니고 있다. 그리고 최근 flexible display의 제조 공정에서 polymer 혹은 plastic 기판을 제조 공정에 적용시키기 위해 저온 공정이 필수적으로 요구 되고 있다. 이러한 기술적 한계를 뛰어 넘기 위해 최근 많은 연구가들은 atmospheric pressure plasma enhanced chemical vapor deposition (AP-PECVD)에 대해 지속적으로 다양한 연구를 하고 있다. 본 연구에서는 remote-type의 modified pin-to-plate dielectric barrier discharge (DBD) 시스템을 이용한 $SiO_2$ 무기 박막 증착에 관해 연구하였다. $O_2$/He/Ar의 gas와 5 kV AC power (30 kHz)의 전원장치를 통해 고밀도 대기압 플라즈마를 발생시켰고, silicon precursor로는 hexamethyldisilazane (HMSD)를 사용하였다. 먼저 HMDS와 $O_2$ gas의 flow rate 변화에 따른 증착률을 조사하였고 그 다음으로 박막의 조성 및 표면 특성을 조사하였다. HMDS의 유량이 100 ~ 300 sccm으로 증가함에 따라 증착속도는 증가했다. 하지만 FT-IR을 통해 HMDS의 유량이 증가하면 반응에 참여할 산소 분자의 부족으로 인해 $-(CH_3)_X$의 peak intensity가 증가하고, -OH의 peak intensity가 점차 감소함을 관찰 할 수 있었다. 또한 증착된 박막의 표면에 particle과 불균일한 surface morphology 등을 SEM image를 통해 관찰 하였다. 산소 유량이 탄소와 관련된 많은 불순물들의 제거에 도움이 됨에도 불구하고 14 slm 이상의 산소가 반응기 내로 주입되게 되면 대기압 플라즈마의 discharge가 불안정하게 되어 공정효율을 저하시키는 요소가 되었다. 결과적으로 HMDS (150 sccm)/$O_2$ (14 slm)/He (5 slm)/Ar (3 slm)의 조건에서 약 42.7 nm/min 증착률을 가지며, 불순물이 적고 surface morphology가 깨끗한 $SiO_2$ 박막을 증착할 수 있었다.

• Journal of Biomedical Engineering Research
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• v.20 no.2
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• pp.183-190
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• 1999

The purpose of this study was to develop a portable and convenient closed-loop contrel type electrical stimulator for patients with foot drop. This system restores walking movement as well as prevents from atrophy or necrosis of lower limb muscles and increases blood circulation in hemiplegic patients caused by traffic accident, industrial disaster or stoke. This system detects the changes of the ankle joint angle during walking, and then controls the stimulus intensity automatically to maintain the programmed level of the ankle joint angle. Also, this automatic system controls the stimulus intensity which is affected by increased electrode impedance resulting from long time use. The system detects the joint angle by an optical sensor and includes modified PID control which adjusts the stimulus intensity if the joint angle deviates from the preset value. Stimulus parameters are 30~80 volt, 40 Hz, and 0.2 ms. The system was applied to five hemiplegic patients for 42 days. Duration of stimulation was 15 min/day for the first week and then the duration was gradually increased to 30, 60, 90 and 120 min/day. The muscle force was increased up to 29.7%, muscle fatigue was decreased compared with the level before stimulation and the pattern of locomotion was improved. These results suggest that the electrical stimulator with closed-loop control type is more convenient and effective in restoration of locomotion of patients with foot drop than open-loop system.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.21 no.2
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• pp.1-16
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• 2022

The location of the bus stop on urban roads should be installed at a point where it is convenient for users and the impact of bus stops on the traffic flow is minimized. However, the location of the bus stops is determined indiscriminately due to the lack of related research. Therefore, this study developed a traffic accident prediction model and calculated the proper separation distance for the bus stops through an optimization technique. The result of the study indicates that the bus stop can be installed in the form of a mid-block approximately 87 to 166 m away from the intersection in the road section. This result is valid if the number of main road lanes in the road section is 2 to 4 with a level of traffic from 1,000 to 3,000 v/h. In the section with 5 to 6 lanes, it is desirable to install a bus stop close to the intersection by about 42 to 97 m.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.5 s.335
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• pp.31-38
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• 2005

The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.1
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• pp.47-55
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• 2005

This work describes an 8b 240 MS/s CMOS ADC as one of embedded core cells for high-performance displays requiring low power and small size at high speed. The proposed ADC uses externally connected pins only for analog inputs, digital outputs, and supplies. The ADC employs (1) a two-step pipelined architecture to optimize power and chip size at the target sampling frequency of 240 MHz, (2) advanced bootstrapping techniques to achieve high signal bandwidth in the input SHA, and (3) RC filter-based on-chip I/V references to improve noise performance with a power-off function added for portable applications. The prototype ADC is implemented in a 0.18 um CMOS and simultaneously integrated in a DVD system with dual-mode inputs. The measured DNL and INL are within 0.49 LSB and 0.69 LSB, respectively. The prototype ADC shows the SFDR of 53 dB for a 10 MHz input sinewave at 240 MS/s while maintaining the SNDR exceeding 38 dB and the SFDR exceeding 50 dB for input frequencies up to the Nyquist frequency at 240 MS/s. The ADC consumes, 104 mW at 240 MS/s and the active die area is 1.36 ㎟.

• 전기의세계
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• v.24 no.4
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• pp.42-51
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• 1975

전기공학은 그 분야가 광범위하면서 세분된 여러 소분야로 구성되어 있기 때문에 이를 간단한 몇마디로 표현하기는 불가능하다. 그러나 전기기술자는 전하를 위시하여 전하간의 힘 및 전하간의 에너지 교환에 관하여 주로 관여하게 된다. 즉 전기기술자는 전기적 에너지 및 정보의 발생, 전송, 기억 및 제어를 최적화할 책임이 있고, 그 분야는 부단히 팽창일로에 있으며 변해가고 있다. 즉 학문적인 기초이론 뿐만아니라 실제 응용분야인 산업분야에서도 눈부신 발전과 변화를 가져왔다. 현대산업 및 기술구조의 질적개선은 기술 반감기의 감소, 막대한 양의 정보처리, 시스템의 대형화, 복잡화 현상을 가져왔으며 기술자체가 사회경제활동에 미치는 영향을 극대화시켰다. 그러므로 오늘날의 모든 전기기술자들은 신뢰성을 고려한 보다 넓은 의미에서의 책임을 느껴야 한다. 조국의 근대화와 방위산업육성 과정에서 중추적 역할을 담당할 이러한 전기공학분야의 중견연구원 및 기술자를 양성하는 공과대학전기공학과의 교과과정 역시 부단히 변하는 각종 환경에 적응될 수 있는 dynamic한 것이 되어야 한다. 즉 공과대학 전기공학과이 교과과정은 어떤 특정되고 고정된 기술 또는 설계에 대한 교과목으로 치우치는 것보다 수명이 길고 강력한 응용력과 창의력을 발휘하여 우리의 기술을 토착화하여 이를 우리의 것으로 만들 수 있는 것이 되어야 한다. 이러한 국내외적인 현실을 고려하여 당학회에서는 1974년도 조사연구사업의 일환으로 교과과정조사회를 구성하여 국내의 여러대학의 전기공학과 교과과정편성에 다소의 도움을 주고저 일차적인 시안으로서 다음과 같은 특징을 갖는 교과과정을 작성하였다.{3}$N$_{4}$등의 산화물 및 질화물로 대표되는 분자성 비정질 물질로서 금지대는 2eV보다 큰 세종류로 크게 분류할 수 있다. 분류할 수 있다. 한다. 단 개개의 문제에 관한 구체적인 해석 또는 검토에 관하여는 다음 기회에 미루기로하고, 우선 여기서는 당면문제로서 대처하지 않으면 안될 자동주파수제어문제및 계통의 경제운용문제만에 한정하여, 이것을 우리나라의 현상과 관련시켜 개설하고, 이들의 자동화에 관한 기본적인 문제를 간단히 적어 보겠다. 가능하다. 제작완료된 ASIC은 기능시험을 완료했으며 실제 line-of-sight(LOS) 시스템 구현에 적용중이다. 시대를 살아 갈 회원들이다. '컨텐츠의 시대'가 개막되는 것이며, 신세기통신과 SK텔레콤은 선의의 경쟁 과 협력을 통해 이동인터넷 서비스의 컨텐츠를 개발해 나가게 될 것이다. 3배가 높았다. 효소 활성에 필수적인 물의 양에 따른 DIAION WA30의 라세미화 효율에 관하여 실험한 결과, 물의 양이 증가할수록 그 효율은 감소하였다. DIAION WA30을 라세미화 촉매로 사용하여 아이소옥탄 내에서 라세믹 나프록센 2,2,2-트리플로로에틸 씨오에스터의 효소적 DKR 반응을 수행해 보았다. 그 결과 DIAION WA30을 사용하지 않은 경우에 비해 반응 전환율과 생성물의 광학 순도는 급격히 향상되었다. 전통적 광학분할 반응의 최대 50%라는 전환율의 제한이 본 연구에서 찾은 DIAION WA30을 첨가함으로써 성공적으로 극복되었다. 또한 고체 염기촉매인 DIAION WA30의 사용은 라세미화 촉매의 회수 및 재사용이 가능하게 해준다.해준다

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.37-47
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• 2006

This work proposes a 10b 25MS/s $0.8mm^2$ 4.8mW 0.13um CMOS A/D Converter (ADC) for high-performance wireless communication systems such as DVB, DAB and DMB simultaneously requiring low voltage, low power, and small area. A two-stage pipeline architecture minimizes the overall chip area and power dissipation of the proposed ADC at the target resolution and sampling rate while switched-bias power reduction techniques reduce the power consumption of analog amplifiers. A low-power sample-and-hold amplifier maintains 10b resolution for input frequencies up to 60MHz based on a single-stage amplifier and nominal CMOS sampling switches using low threshold-voltage transistors. A signal insensitive 3-D fully symmetric layout reduces the capacitor and device mismatch of a multiplying D/A converter while low-noise reference currents and voltages are implemented on chip with optional off-chip voltage references. The employed down-sampling clock signal selects the sampling rate of 25MS/s or 10MS/s with a reduced power depending on applications. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.42LSB and 0.91LSB and shows a maximum SNDR and SFDR of 56dB and 65dB at all sampling frequencies up to 2SMS/s, respectively. The ADC with an active die area if $0.8mm^2$ consumes 4.8mW at 25MS/s and 2.4mW at 10MS/s at a 1.2V supply.