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An 8b 240 MS/s 1.36 ㎟ 104 mW 0.18 um CMOS ADC for High-Performance Display Applications  

In Kyung-Hoon (Dept. of Electronic Engineering and Interdisciplinary Program of Integrated Biotechnology, Sogang University)
Kim Se-Won (Dept. of Electronic Engineering and Interdisciplinary Program of Integrated Biotechnology, Sogang University)
Cho Young-Jae (Dept. of Electronic Engineering and Interdisciplinary Program of Integrated Biotechnology, Sogang University)
Moon Kyoung-Jun (Dept. of Electronic Engineering and Interdisciplinary Program of Integrated Biotechnology, Sogang University)
Jee Yong (Dept. of Electronic Engineering and Interdisciplinary Program of Integrated Biotechnology, Sogang University)
Lee Seung-Hoon (Dept. of Electronic Engineering and Interdisciplinary Program of Integrated Biotechnology, Sogang University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.42, no.1, 2005 , pp. 47-55 More about this Journal
Abstract
This work describes an 8b 240 MS/s CMOS ADC as one of embedded core cells for high-performance displays requiring low power and small size at high speed. The proposed ADC uses externally connected pins only for analog inputs, digital outputs, and supplies. The ADC employs (1) a two-step pipelined architecture to optimize power and chip size at the target sampling frequency of 240 MHz, (2) advanced bootstrapping techniques to achieve high signal bandwidth in the input SHA, and (3) RC filter-based on-chip I/V references to improve noise performance with a power-off function added for portable applications. The prototype ADC is implemented in a 0.18 um CMOS and simultaneously integrated in a DVD system with dual-mode inputs. The measured DNL and INL are within 0.49 LSB and 0.69 LSB, respectively. The prototype ADC shows the SFDR of 53 dB for a 10 MHz input sinewave at 240 MS/s while maintaining the SNDR exceeding 38 dB and the SFDR exceeding 50 dB for input frequencies up to the Nyquist frequency at 240 MS/s. The ADC consumes, 104 mW at 240 MS/s and the active die area is 1.36 ㎟.
Keywords
ADC; CMOS;
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