• Proceedings of the KOSOMBE Conference
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• v.1993 no.11
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• pp.60-62
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• 1993

• Geophysics and Geophysical Exploration
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• v.14 no.4
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• pp.316-323
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• 2011

To test the applicability of resistivity survey methods for the archaeological prospection of a large-scale tumulus, a three-dimensional resistivity survey was conducted at the $3^{rd}$ tumulus at Bokam-ri, in Naju city, South Korea. Since accurate topographic relief of the tumulus and electrode locations are required to obtain a high resolution image of the subsurface, electrodes were installed after making grids by threads, which is commonly used in the archaeological investigation. In the data acquisition, data were measured using a 2 m electrode spacing with the line spacing of 1 m and each survey line was shifted 1 m to form an effective grid of 1 m ${\times}$ 1 m. Though the 3-D inversion of data, we could obtain the 3-D image of the tumulus, where we could identify the brilliant signature of buried tombs made of stones. The results were compared with the previous excavation results and we could convince that a 3-D resistivity imaging method is very useful to investigate a large-scale tumulus.

• Applied Chemistry for Engineering
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• v.29 no.6
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• pp.759-764
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• 2018

3D porous carbon electrodes (cNPIM), prepared by solution casting of a polymer of intrinsic microporosity (PIM-1) followed by nonsolvent-induced phase separation (NIPS) and carbonization are presented. In order to effectively control the pore size of 3D porous carbon structures, cNPIM was prepared by varying the THF ratio of mixed solvents. The SEM analysis revealed that cNPIMs have a unique 3D macroporous structure having a gradient pore structure, which is expected to grant a smooth and easy ion transfer capability as an electrode material. In addition, the cNPIMs presented a very large specific surface area ($2,101.1m^2/g$) with a narrow micropore size distribution (0.75 nm). Consequently, the cNPIM exhibits a high specific capacitance (304.8 F/g) and superior rate capability of 77% in an aqueous electrolyte. We believe that our approach can provide a variety of new 3D porous carbon materials for the application to an electrochemical energy storage.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1401-1403
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• 2007

플라즈마 디스플레이 패널(PDP)에서의 가장 큰 문제점 중의 하나는 낮은 발광 효율이다. 그리고 또 다른 문제점은 높은 가격에 있다. 최근 디스플레이 시장에서의 가격 경쟁이 격화 되면서 상판 유리로 ITO glass 를 사용하지 않고 버스 전극만 사용한 구조들의 연구가 진행되고 있다. ITO-less 전극 구조의 경우 ITO구조에 비하여 휘도가 낮다는 단점이 있지만 공정의 간소화로 인해 패널 가격을 낮추는데 큰 이점이 있다. 본 논문에서는 몇 가지 ITO-less 전극구조의 방전특성을 비교해보고 가능성을 제시하고자 한다.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.4
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• pp.117-128
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• 2016

Installation of earth grounding system is essential to ensure personnel safety and correct operation of electrical equipment. Earth parameters, especially, soil resistivity has to be determined in designing an efficient earth grounding system. The most common applied technique to measure soil resistance is Wenner four-point method. Implementation of this method is expensive, time consuming and cumbersome as large set of measurements with variable electrode spacing are required to obtain a one dimensional resistivity plot. It is advantageous to have a method which is of low cost and provides fast measurements. In this perspective, electrical resistance tomography (ERT) is applied to estimate subsurface resistivity profile. Electrical resistance tomograms characterize the soil resistivity distribution based on the measurements from electrodes placed in the region of interest. The nonlinear ill-posed inverse problem is solved using iterated Gauss-Newton method with Tikhonov regularization. Through extensive numerical simulations, it is found that ERT offers promising performance in estimating the three-dimensional soil resistivity distribution.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.05a
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• pp.139-141
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• 2005

이번 실험에서는 변방전형 교류 PDP에서의 3차원적인 전자온도와 이온밀도의 측정을 마이크로 랑뮈르 탐침법을 통해 실험적으로 연구하였다. 스테핑 모터에 연결된 마이크로 랑뮈르 탐침은 20um씩 움직이며 탐침에 인가하는 플러스와 마이너스의 직류전압을 통해 I-V곡선을 구할 수 있고 이를 통해서 전자온도와 플라스마 밀도를 구할 수 있다. Ne+Xe(4%) 200Torr의 혼합가스에서 전극의 테두리를 따라(X축) 전자온도 및 플라스마 밀도를 측정한 결과 중앙지점에서와 전극의 경계지역에서 이온밀도는 $7.69{\sim}11.1{\times}10^{11}cm^{-3}$ 까지 측정되었다. 또한 전자온도는 플라스마 밀도와 균형적인 관계에 있다는 것은 주목할 만하다. 전자온도는 전극 사이의 중심에서 가장 적게 1.3 ~ 3.15eV까지 측정되었다. Y축으로 측정했을 경우 이온 밀도와 전자온도는 전극 갭 중앙에서부터 약 80um 떨어진 지점에서 서로 교차하며 증가 및 감소였으며 이온밀도는 $8.3{\sim}11.1{\times}10^{11}cm^{-3}$로 측정되었고 전자온도는 이와 균형적인 관계를 가지고 1.2~1.6eV로 측정되었다. 또한 이러한 특성은 AC PDP 에서 나타나는 줄무늬 현상과 관련이 있는 것으로 보인다. Z축으로 측정했을 경우 약 125um높이에서 가장 높게 측정되었으며 $1.1{\times}10^{12}cm^{-3}$정도로 측정되었다.

• Journal of the Korean Geophysical Society
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• v.6 no.3
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• pp.155-164
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• 2003

The validity and efficiency of the roll-along technique widely used in 2-D electrical resistivity survey are analyzed in case of the dipole-dipole and the Wenner-Schlumberger arrays by numerical modelling. The shallow anomalous resistivity bodies are successfully inverted both in the dipole-dipole and in the Wenner-Schlumberger arrays because the shallow data of pseudosection are not omitted by the roll-along technique. However, the deep anomalous resistivity bodies can not be well resolved due to the skip of observed data which is more significant in the Wenner-Schlumberger array having relatively poor horizontal coverage of obtaining data. Carrying out electrical survey adopting the dipole-dipole array, the skip of data is insignificant because it is unfeasible to expand the electrodes to the maximum electrode separation coefficient($n_max$) owing to low S/N ratio. In case of the Wenner-Schlumberger array, however, because it is generally feasible to expand the electrodes $n_max$ to the owing to high S/N ratio, it is highly possible that skip of data from the roll-along technique causes significant distortion of inversion results. Therefore, adopting the Wenner-Schlumberger array having deeper median depth(Edwards, 1977) than do the dipole-dipole array on condition of the same unit electrode spacing( ($a$) ) and $n_max$, it is recommended to determine $a$ based on not $n_max$but $n_prob$free from the skip of observing data and forward electrodes with keeping overlap interval 3/4 of the survey line length in order to reduce the distortion of resistivity structure and perform resistivity survey efficiently. These results are confirmed by numerical modelling.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.7-12
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• 2007

A SPICE-based 3-dimensional circuit model of LED(Light-Emitting Diode) was developed for the design optimization and analysis of high-brightness LEDs. An LED is represented as an array of pixel LEDs with small preassigned areas, and each of the pixel LEDs is composed of circuit networks representing the thin-film layers(n-metal, n- and p-type semiconductor layers, and p-metal), ohmic contacts, and pn-junctions. Each of the thin-film layers and contact resistances is modeled by a resistance network, and the pn-junction is modeled by a conventional pn-junction diode. It has been found that the simulation results using the model and the corresponding parameters precisely fit the measured LED characteristics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.3
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• pp.12-17
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• 2011

In this paper, we report on the improved electrical and optical characteristics for decreasing current crowding effect and uniform current distribution by designing octagonal finger type electrode pattern in large-scale lateral GaN (Gallium Nitride) LED (Light-emitting diode) with numerical 3-D simulator. Compared with the conventional electrode pattern, proposed electrode pattern was investigated to confirm the improvement of characteristics. From the simulation results of 3-D SpeCLED/RATRO simulator, we found that the forward voltage was decreased by 0.34 V and the light output power was improved by 7.72 mW at the same injection current condition in the LED with proposed octagonal finger type electrode.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2011.05a
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• pp.175-177
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• 2011

오늘날 반도체 소자의 성능을 좌우하는 배선폭은 수십 나노미터급으로 배선폭 감소에 의한 소자의 집적은 한계에 다다르고 있다. 또한 2차원 회로 소자의 문제점으로 지적되는 과도한 전력소모, RC Delay, 열 발생 문제등도 쟁점사항이 되고 있다. 이런 2차원 회로를 3차원으로 쌓아올린다면 보다 효율적인 회로구성이 가능할 것이고 이에 따른 성능향상이 클 것이다. 3차원 회로 구성의 핵심기술은 기판을 관통하여 다른 층의 회로를 연결하는 실리콘 관통 전극을 형성하는 것이다.