• Title/Summary/Keyword: 2.65 GHz

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Antenna for EMI Site Validation above 1 GHz (1 GHz 이상의 EMI 시험장 적합성 평가용 안테나)

  • Kong, Sung-Sik;Chung, Sam-Young
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.65-66
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    • 2006
  • In this paper, we designed and fabricated a broadband antenna for EMI site validation above 1 GHz. To develop the antenna which is satisfied omni-directional radiation pattern and broadband characteristics required by CISPR, we designed biconical type with cylindrical load. The developed antenna has good characteristics of the radiation patterns and VSWR<2 the frequency range from 1 GHz to 18 GHz.

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5.8GHz Band Frequency Synthesizer using Harmonic Oscillator (하모닉 발진을 이용한 5.8GHz 대역 주파수 합성기)

  • Choi, Jong-Won;Lee, Moon-Que;Shin, Keum-Sik;Son, Hyung-Sik
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.304-308
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    • 2003
  • A low cost solution employing harmonic oscillation to the frequency synthesizer at 5.8 GHz is proposed. The proposed frequency synthesizer is composed of 2.9GHz PLL chip, 2.9GHz oscillator, and 5.8GHz buffer amplifier. The measured data shows a frequency tuning range of 290MHz, ranging from 5.65 to 5.94GHz, about 0.5dBm of output power, and a phase noise of -107.67 dBc/Hz at the 100kHz offset frequency. All spurious signals including fundamental oscillation power (2.9GHz) are suppressed at least 15dBc than the desired second harmonic signal.

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A Fast-Locking All-Digital Frequency Multiplier (고속-락킹 디지털 주파수 증배기)

  • Lee, Chang-Jun;Kim, Jong-Sun
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.1158-1162
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    • 2018
  • A fast-lock multiplying delay-locked loop (MDLL)-based digital clock frequency multiplier with an anti-harmonic lock capability is presented. The proposed digital frequency multiplier utilizes a new most-significant bit (MSB)-interval search algorithm to achieve fast-locking time without harmonic lock problems. The proposed digital MDLL frequency multiplier is designed in a 65nm CMOS process, and the operating output frequency range is from 1 GHz to 3 GHz. The digital MDLL provides a programmable fractional-ratio frequency multiplication ratios of N/M, where N = 1, 4, 5, 8, 10 and M = 1, 2, 3, respectively. The proposed MDLL consumes 3.52 mW at 1GHz and achieves a peak-to-peak (p-p) output clock jitter of 14.07 ps.

MMIC Low Noise Amplifier Design for Millimeter-wave Application (밀리미터파 응용을 위한 MMIC 저잡음 증폭기 설계)

  • 장병준;염인복;이성팔
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.7
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    • pp.1191-1198
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    • 2001
  • MMIC low noise amplifiers for millimeter-wave application using 0.15 $\mu$m pHEMT have been presented in this paper. The design emphasis is on active device model and EM simulation. The deficiency of conventional device models is identified. A distributed device model has been adapted to circumvent the scaling problems and, thus, to predict small signal and noise parameters accurately. Two single-ended low noise amplifier are designed using distributed active device model for Q-band(40 ∼ 44 GHz) and V-band(58 ∼65 GHz) application. The Q-band amplifier achieved a average noise figure of 2.2 dB with 18.3 dB average gain. The V-band amplifier achieved a average noise figure of 2.9 dB with 14.7 dB average gain. The design technique and model employed provides good agreement between measured and predicted results. Compared with the published data, this work also represents state-of-the-art performance in terms of gain and noise figure.

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Development of Ceramic Filter Using Non Radiative Microstrip Line In Millimeter-Wave (비방사 마이크로 스트립 선로를 이용한 밀리미터 대역의 세라믹 필터 개발)

  • Shin, Cheon-Woo;Kim, Tae-Heon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.6A
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    • pp.648-656
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    • 2007
  • This paper is about band pass filter, using Ceramics in the condition of center frequency 370Hz at milli-wave. The band pass filter is applied to Broadband Convergence Network, representing WLL(Wireless Local Loop) and LMDS(Local Multi-point Distribution Service). Sticking ceramic between strip line on a dielectric material substrate with which conductor's covers upper and basal surface, One will house the exterior by using structural resonance. In this Non Radiative Microstrip Line Filter structure, based upon simulations, generalized the two formulas finding resonant frequency of 1step ceramic resonator and bandwidth of 4step ceramic resonator. Also, As a result of experiment, using Network Analyzer, about created a experiment of structure based on the simulation result of 4-step ceramic resonator, It showed good characteristic of targeted bandwidth, comparing simulated result of 36.58GHz$\sim$37.650GHz with experimented result of 36.6GHz$\sim$37.65GHz.

A triple band printed monopole antenna with a bent branch strips for WiFi / 5G (와이파이 및 5G용 굽은 가지 스트립을 가진 삼중대역 인쇄형 모노폴 안테나)

  • Min-Woo Kim;Dong-Gi Shin;Oh-Rim Ryu;Young-Soon Lee
    • Journal of Advanced Navigation Technology
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    • v.25 no.6
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    • pp.536-542
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    • 2021
  • In this paper, we proposed a triple band printed monopole antenna with a bent branch strips for WiFi / 5G. An antenna structure in which bent strips for generating multiple resonance are attached in the form of branches was newly proposed based on a typical monopole strip vertically erected as a triple band antenna structure. The proposed antenna is designed on a FR-4 substrate with dielectric constant 4.3, thickness of 1.6 mm, and size of 28×40 mm2. The measured impedance bandwidth is 430 MHz (2.22~2.65 GHz) in the 2.4 GHz WLAN, 450 MHz (3.38~3.83 GHz) in the 3.5 GHz and 2390 MHz (4.95~7.34 GHz), In particular, it has been observed that antenna has a stable omnidirectional radiation patterns as well as gain of 1.537 dBi, 1.878 dBi and 2.337 dBi in the entire frequency band of interest.

A Design of Voltage Controlled Oscillator and High Speed 1/4 Frequency Divider using 65nm CMOS Process (65nm CMOS 공정을 이용한 전압제어발진기와 고속 4분주기의 설계)

  • Lee, Jongsuk;Moon, Yong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.11
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    • pp.107-113
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    • 2014
  • A VCO (Voltage Controlled Oscillator) and a divide-by-4 high speed frequency divider are implemented using 65nm CMOS technology for 60GHz wireless communication system. The mm-wave VCO was designed by NMOS cross-coupled LC type using current source. The architecture of the divide-by-4 high speed frequency divider is differential ILFD (Injection Locking Frequency Divider) with varactor to control frequency range. The frequency divider also uses current sources to get good phase noise characteristics. The measured results show that the VCO has 64.36~67.68GHz tuning range and the frequency divider divides the VCO output by 4 exactly. The high output power of 5.47~5.97dBm from the frequency divider is measured. The phase noise of the VCO including the frequency divider are -77.17dBc/Hz at 1MHz and -110.83dBc/Hz at 10MHz offset frequency. The power consumption including VCO is 38.4mW with 1.2V supply voltage.

Design of 77 GHz Automotive Radar Interferer Generator (77 GHz 차량용 레이다 간섭신호 발생기 설계)

  • Kim, Dong-Kyun;Cui, Chenglin;Kwon, Oh-Yun;Yoon, Chai-Won;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.9
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    • pp.865-871
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    • 2016
  • This work presents a radar signal interferer to be used for evaluating the mutual interference among automotive radars. The developed interfering signal generator is composed of a reference signal generator and a 77 GHz transmitter. Reference signal generator is made up of commercial chips and board, it can generate various modulated signal such as triangular wave, sawtooth wave and random frequency hopping. The transmitter generates 77 GHz band signal by multiplying modulated reference signal frequency 28 times. Transmitter was fabricated using 65 nm CMOS process, it can operate horn antenna by built in on-chip waveguide feeder. The transmitter exhibited 7.31~8.06 dBm output power over a frequency lock range of 75.6~77 GHz.

A 120 GHz Voltage Controlled Oscillator Integrated with 1/128 Frequency Divider Chain in 65 nm CMOS Technology

  • Kim, Namhyung;Yun, Jongwon;Rieh, Jae-Sung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.1
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    • pp.131-137
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    • 2014
  • A 120 GHz voltage controlled oscillator (VCO) with a divider chain including an injection locked frequency divider (ILFD) and six static frequency dividers is demonstrated using 65-nm CMOS technology. The VCO is designed based on the LC cross-coupled push-push structure and operates around 120 GHz. The 60 GHz ILFD at the first stage of the frequency divider chain is based on a similar topology as the core of the VCO to ensure the frequency alignment between the two circuit blocks. The static divider chain is composed of D-flip flops, providing a 64 division ratio. The entire circuit consumes a DC power of 68.5 mW with the chip size of $1385{\times}835{\mu}m^2$.

An Omnidirectional Planar Antenna with Four Stepped L-shape slots (4개의 계단형 L-슬롯 구조를 갖는 전방향성 평면 안테나)

  • Nam, Sung-Soo;Lee, Hong-Min
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.1 no.3
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    • pp.3-8
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    • 2008
  • In this paper, an planar antenna which has omnidirectional radiation pattern in H-plane and low profile is proposed. By adding inductance elements of an ENG shell structure, a capacitance element of an electrically small antenna is easily achieved with impedance matching. An ENG shell structure is consist of a inductive loading structure which has symmetrical four stepped L-shape slots. The simulated result shows, the impedance bandwidth of the proposed antenna is 150MHz (2.5 ~ 2.65GHz). The simulated maximum radiation gain of proposed antenna is 1.12 dBi at center frequency 2.56GHz. Omnidirectional radiation pattern is achieved. The proposed antenna will be applied to wireless lan access point system.

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