• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.12
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• pp.8643-8648
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• 2015

In this paper presents the design and demonstrate 8 W 3-stage HPA(High Power Amplifier) MMIC(Monolithic Microwave Integrated Circuits) for Ka-band down link satellite communications payload system at 19.5 GHz ~ 22 GHz frequency band. The HPA MMIC consist of 3-stage GaN HEMT(Hight Electron Mobility Transistors). The gate periphery of $1^{st}$ stage, $2^{nd}$ stage and output stage is determined $8{\times}50{\times}2$ um, $8{\times}50{\times}4$ um and $8{\times}50{\times}8$ um, respectively. The fabricated HPA MMIC shows size $3,400{\times}3,200um^2$, small signal gain over 29.6 dB, input matching -8.2 dB, output matching -9.7 dB, output power 39.1 dBm and PAE 25.3 % by using 0.15 um GaN technology at 20 V supply voltage in 19.5~22 GHz frequency band. Therefore, this HPA MMIC is believed to be adaptable Ka-band satellite communication payloads down link system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1604-1611
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• 2003

For dual­band operation, it can be done by loading two pair of slits in the equilateral­triangular patch, one embeded close to the side edges of the patch and the other inserted at the bottom edge of the patch. The frequency ratio of the two operating frequencies can be tuned by varing the positions and lengths of the inserted slots at the bottom edge of the patch. While the calculated frequency ratio of the antenna by Ensemble 5.0 is $1.66 ({f_10}=1.928GHz, {f_20}=3.2GHz)$, the measured one is 2.04 $({f_10}=1.6806 GHz, {f_20}=3.435 GHz)$. The error in the frequency ratio is due on the fabrication dimension and feeding position error as well as on the permittivity dispersion effect.

• Journal of the Semiconductor & Display Technology
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• v.20 no.2
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• pp.25-28
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• 2021

In this paper, we studied smart phone RF wireless charging with 5.8-GHz microwave wireless power receiver. The dc output of the receiver connected to super capacitor and DC-DC converter for charging a smart phone. This configuration stably supplies 5V and current for charging it. Studies show that the more receivers are used at close range, the higher the received voltage values and the larger the capacity of the super capacitor, the longer the charging time. The present 5.8-GHz 1W wireless power transmission system is not enough for charging a smartphone mainly due to the lack of current of the receiver.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.7
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• pp.23-29
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• 2012

The LC-based digitally controlled oscillator (LC-DCO), a key component of the all digital phase locked loop (ADPLL), is designed using $0.18{\mu}m$ RFCMOS process with 1.8 V supply. The NMOS core with double cross-coupled pair is chosen to realize wide tuning range, and the PMOS varactor pair that has small capacitance of a few aF and the capacitive degeneration technique to shrink the capacitive element are adopted to obtain the high frequency resolution. Also, the noise filtering technique is used to improve phase noise performance. Measurement results show the center frequency of 2.7 GHz, the tuning range of 2.5 GHz and the high frequency resolution of 2.9 kHz ~7.1 kHz. Also the fine tuning range and the current consumption of the core could be controlled by using the array of PMOS transistors using current biasing. The current consumption is between 17 mA and 26 mA at 1.8V supply voltage. The proposed DCO could be used widely in various communication system.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.1
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• pp.137-146
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• 2009

We present a micromechanical digital-to-analog (DA) variable capacitor using a parallel digital actuator array, capable of accomplishing high-Q tuning. The present DA variable capacitor uses a parallel interconnection of digital actuators, thus achieving a low resistive structure. Based on the criteria for capacitance range ($0.348{\sim}1.932$ pF) and the actuation voltage (25 V), the present parallel DA variable capacitor is estimated to have a quality factor 2.0 times higher than the previous serial-parallel DA variable capacitor. In the experimental study, the parallel DA variable capacitor changes the total capacitance from 2.268 to 3.973 pF (0.5 GHz), 2.384 to 4.197 pF (1.0 GHz), and 2.773 to 4.826 pF (2.5 GHz), thus achieving tuning ratios of 75.2%, 76.1%, and 74.0%, respectively. The capacitance precisions are measured to be $6.16{\pm}4.24$ fF (0.5 GHz), $7.42{\pm}5.48$ fF (1.0 GHz), and $9.56{\pm}5.63$ fF (2.5 GHz). The parallel DA variable capacitor shows the total resistance of $2.97{\pm}0.29\;{\Omega}$ (0.5 GHz), $3.01{\pm}0.42\;{\Omega}$ (1.0 GHz), and $4.32{\pm}0.66\;{\Omega}$ (2.5 GHz), resulting in high quality factors which are measured to be $33.7{\pm}7.8$ (0.5 GHz), $18.5{\pm}4.9$ (1.0 GHz), and $4.3{\pm}1.4$ (2.5 GHz) for large capacitance values ($2.268{\sim}4.826$ pF). We experimentally verify the high-Q tuning capability of the present parallel DA variable capacitor, while achieving high-precision capacitance adjustments.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.11
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• pp.58-65
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• 1993

The Ku-band GaAs MESFET mixer is designed and implemented using the LINMIC+, the microwave CAD simulator. The RF and IF is 14.0GHz and 1.0GHz, respectively. P$_{LO}$ is 0dBm, it can be obtained 5.8dB of the minimum noise figure at 1.4GHz and 5.8dB of the maximum conversion gain at 1.45GHz. Effects of bias and power level of local oscillator frequency are observed and the characteristics are verified.

• Journal of electromagnetic engineering and science
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• v.17 no.1
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• pp.20-28
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• 2017

A fully integrated dual-band CMOS power amplifier (PA) is developed for 802.11n WLAN applications using wafer-level package (WLP) technology. This paper presents a detailed design for the optimal impedance of dual-band PA (2 GHz/5 GHz PA) output transformers with low loss, which is provided by using 2:2 and 2:1 output transformers for the 2 GHz PA and the 5 GHz PA, respectively. In addition, several design issues in the dual-band PA design using WLP technology are addressed, and a design method is proposed. All considerations for the design of dual-band WLP PA are fully reflected in the design procedure. The 2 GHz WLP CMOS PA produces a saturated power of 26.3 dBm with a peak power-added efficiency (PAE) of 32.9%. The 5 GHz WLP CMOS PA produces a saturated power of 24.7 dBm with a PAE of 22.2%. The PA is tested using an 802.11n signal, which satisfies the stringent error vector magnitude (EVM) and mask requirements. It achieved an EVM of -28 dB at an output power of 19.5 dBm with a PAE of 13.1% at 2.45 GHz and an EVM of -28 dB at an output power of 18.1 dBm with a PAE of 8.9% at 5.8 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.11
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• pp.842-850
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• 2018

In this paper, the design and fabrication of a frequency-locked-loop(FLL) 5-GHz oscillator with a single resonator is presented. The proposed oscillator is the simplified version of the previous FLL oscillator with two separate resonators in the VCO and frequency detector. The resonator is commonly used in the VCO and frequency detector of the proposed oscillator configuration. The 5-GHz oscillator is implemented on the hetero-multilayer substrate composed of a Rogers' RO4350B laminate, which has excellent high-frequency performance, and the commercial FR4 three-layer substrate. The frequency locking occurs at approximately 5 GHz and has an output power of 3.8 dBm. The phase noise has a free-run VCO phase noise at frequencies above 1 kHz, and an FLL background noise at frequencies below 1 kHz. For this loop-filter, the phase noise showed an improvement of approximately 12 dB at the offset-frequency of 100 Hz.

• Journal of Advanced Navigation Technology
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• v.19 no.6
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• pp.623-629
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• 2015

In the present study, a coplanar waveguide (CPW)-fed printed monopole antenna with an inverted n-shaped slot is newly proposed for dual band operations which cover bandwidths of CDMA (1.85~2.025 GHz) and WLAN (2.4~2.484 GHz) as well as implementation of omnidirectional radiation pattern. For enhancement of impedance bandwidth ($S11{\leq}10dB$) in 2.4 GHz WLAN frequency band, an inverted n-shaped slot instead of the previous n-shaped slot is etched on the printed radiating monopole. The proposed antenna is designed and fabricated on one side of FR4 substrate with dielectric constant of 4.4, thickness of 1.6 mm, and size of $50{\times}25mm^2$. It has been observed that the measured impedance bandwidths are 280 MHz (1.84~2.12 GHz) in frequency band of CDMA and 420 MHz (2.38~2.8 GHz) in WLAN frequency band respectively. It is noticeable that impedance bandwidth in 2.4 GHz frequency band of WLAN is enlarged to three times due to use of inverted L-shaped slot in comparison with impedance bandwidth 140 MHz (2.39~2.53 GHz) obtained by use of the previous n-shaped slot. In addition, good omnidirectional radiation patterns have been observed over the entire frequency band of interest.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.1
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• pp.11-17
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• 2017

In this paper, an 8-direction switched beamforming antenna system at 28GHz frequency band is described for 5th generation wireless communication. This system is composed of an $8{\times}8$ Butler matrix and an 8-element patch array antenna. The antenna system switches beams in 8-direction in the wide range of ${\pm}40^{\circ}$. The antenna spacing is $0.65{\lambda}$ to achieve ${\pm}40^{\circ}$ steering range. Designed results show that the 8-direction beams are placed at ${\pm}6^{\circ}$, ${\pm}17^{\circ}$, ${\pm}28^{\circ}$, ${\pm}40^{\circ}$ offset from the center. Parasitic radiation effect from the large dimension Butler matrix need to be suppressed by employing a stripline structure.