• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.6
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• pp.1422-1428
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• 2014

This paper has analyzed threshold voltage roll-off for bottom gate voltages of asymmetric double gate(DG) MOSFET. Since the asymmetric DGMOSFET is four terminal device to be able to separately bias for top and bottom gates, the bottom gate voltage influences on threshold voltage. It is, therefore, investigated how the threshold voltage roll-off known as short channel effects is reduced with bottom gate voltage. In the pursuit of this purpose, off-current model is presented in the subthreshold region, and the threshold voltage roll-off is observed for channel length and thickness with a parameter of bottom gate voltage as threshold voltage is defined by top gate voltage that off-currnt is $10^{-7}A/{\mu}m$ per channel width. As a result to observe the threshold voltage roll-off for bottom gate voltage using this model, we know the bottom gate voltage greatly influences on threshold voltage roll-off voltages, especially in the region of short channel length and thickness.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.3
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• pp.657-662
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• 2014

This paper has analyzed the subthreshold swings for top and bottom gate voltages of asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET is four terminal device to be able to separately bias for top and bottom gates. The subthreshold swing, therefore, has to be analyze not only for top gate voltage, but also for bottom gate voltage. In the pursuit of this purpose, Poisson equation has been solved to obtain the analytical solution of potential distribution with Gaussian function, and the subthreshold swing model has been presented. As a result to observe the subthreshold swings for the change of top and bottom gate voltage using this subthreshold swing model, we know the subthreshold swings are greatly changed for gate voltages. Especially we know the conduction path has been changed for top and bottom gate voltage and this is expected to greatly influence on subthreshold swings.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.704-707
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• 2013

This paper has analyzed the subthreshold swings for top and bottom gate voltages of asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET is four terminal device to be able to separately bias for top and bottom gates. The subthreshold swing, therefore, has to be analyze not only for top gate voltage, but also for bottom gate voltage. In the pursuit of this purpose, Poisson equation has been solved to obtain the analytical solution of potential distribution with Gaussian function, and the subthreshold swing model has been presented. As a result to observe the subthreshold swings for the change of top and bottom gate voltage using this subthreshold swing model, we know the subthreshold swings are greatly changed for gate voltages. Especially we know the conduction path has been changed for top and bottom gate voltage and this is expected to greatly influence on subthreshold swings.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.741-744
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• 2014

This paper has analyzed threshold voltage roll-off for bottom gate voltages of asymmetric double gate(DG) MOSFET. Since the asymmetric DGMOSFET is four terminal device to be able to separately bias for top and bottom gates, the bottom gate voltage influences on threshold voltage. It is, therefore, investigated how the threshold voltage roll-off known as short channel effects is reduced with bottom gate voltage. In the pursuit of this purpose, off-current model is presented in the subthreshold region, and the threshold voltage roll-off is observed for channel length and thickness with a parameter of bottom gate voltage as threshold voltage is defined by top gate voltage that off-currnt is $10^{-7}A/{\mu}m$ per channel width. As a result to observe the threshold voltage roll-off for bottom gate voltage using this model, we know the bottom gate voltage greatly influences on threshold voltage roll-off voltages, especially in the region of short channel length and thickness.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.745-748
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• 2014

본 연구에서는 비대칭 이중게이트(double gate; DG) MOSFET의 채널길이에 대한 문턱전압이하 스윙의 변화에 대하여 분석하였다. 문턱전압이하 스윙은 트랜지스터의 디지털특성을 결정하는 중요한 요소로서 채널길이가 감소하면 특성이 저하되는 문제가 나타나고 있다. 이러한 문제를 해결하기 위하여 개발된 DGMOSFET의 문턱전압이하 스윙의 채널길이에 대한 변화를 채널두께, 산화막두께, 상하단 게이트 전압 및 도핑농도 등에 따라 조사하고자 한다. 특히 하단 게이트 구조를 상단과 달리 제작할 수 있는 비대칭 DGMOSFET에 대하여 문턱전압이하 스윙을 분석함으로써 하단 게이트 전압 및 하단 산화막 두께 등에 대하여 자세히 관찰하였다. 문턱전압이하 스윙의 해석학적 모델을 구하기 위하여 포아송방정식에서 해석학적 전위분포모델을 유도하였으며 도핑분포함수는 가우스분포함수를 사용하였다. 결과적으로 문턱전압이하 스윙은 상하단 게이트 전압 및 채널도핑농도 그리고 채널의 크기에 매우 민감하게 변화하고 있다는 것을 알 수 있었다.

• Journal of IKEEE
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• v.24 no.1
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• pp.194-199
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• 2020

The threshold voltage roll-off for an asymmetric junctionless double gate MOSFET is analyzed according to the top and bottom gate oxide thicknesses. In the asymmetric structure, the top and bottom gate oxide thicknesses can be made differently, so that the top and bottom oxide thicknesses can be adjusted to reduce the leakage current that may occur in the top gate while keeping the threshold voltage roll-off constant. An analytical threshold voltage model is presented, and this model is in good agreement with the 2D simulation value. As a result, if the thickness of the bottom gate oxide film is decreased while maintaining a constant threshold voltage roll-off, the top gate oxide film thickness can be increased, and the leakage current that may occur in the top gate can be reduced. Especially, it is observed that the increase of the bottom gate oxide thickness does not affect the threshold voltage roll-off.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.12
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• pp.2939-2945
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• 2014

This paper has analyzed the change of threshold voltage for oxide structure of symmetric and asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET can be fabricated with different top and bottom gate oxide thickness, while the symmetric DGMOSFET has the same top and bottom gate oxide thickness. Therefore optimum threshold voltage is considered for top and bottom gate oxide thickness of asymmetric DGMOSFET, compared with the threshold voltage of symmetric DGMOSFET. To obtain the threshold voltage, the analytical potential distribution is derived from Possion's equation, and Gaussian distribution function is used as doping profile. We investigate for bottom gate voltage, channel length and thickness, and doping concentration how top and bottom gate oxide thickness influences on threshold voltage using this threshold voltage model. As a result, threshold voltage is greatly changed for oxide thickness, and we know the changing trend greatly differs with bottom gate voltage, channel length and thickness, and doping concentration.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.3
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• pp.571-576
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• 2016

Asymmetric double gate(DG) MOSFET has the different top and bottom gate oxides thicknesses. It is analyzed the deviation of subthreshold swing(SS) and conduction path for the ratio of top and bottom gate oxide thickness of asymmetric DGMOSFET. SS varied along with conduction path, and conduction path varied with top and bottom gate oxide thickness. The asymmetric DGMOSFET became valuable device to reduce the short channel effects like degradation of SS. SSs were obtained from analytical potential distribution by Poisson's equation, and it was analyzed how the ratio of top and bottom oxide thickness influenced on conduction path and SS. SSs and conduction path were greatly influenced by the ratio of top and bottom gate oxide thickness. Bottom gate voltage cause significant influence on SS, and SS are changed with a range of 200 mV/dec for $0<t_{ox2}/t_{ox1}<5$ under bottom voltage of 0.7 V.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.755-758
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• 2014

This paper has analyzed the change of threshold voltage for oxide structure of symmetric and asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET can be fabricated with different top and bottom gate oxide thickness, while the symmetric DGMOSFET has the same top and bottom gate oxide thickness. Therefore optimum threshold voltage is considered for top and bottom gate oxide thickness of asymmetric DGMOSFET, compared with the threshold voltage of symmetric DGMOSFET. To obtain the threshold voltage, the analytical potential distribution is derived from Possion's equation, and Gaussian distribution function is used as doping profile. We investigate for bottom gate voltage, channel length and thickness, and doping concentration how top and bottom gate oxide thickness influences on threshold voltage using this threshold voltage model. As a result, threshold voltage is greatly changed for oxide thickness, and we know the changing trend very differs with bottom gate voltage, channel length and thickness, and doping concentration.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.1
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• pp.163-168
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• 2015

This paper analyzed the deviation of tunneling current for bottom gate voltage of sub-10 nm asymmetric double gate MOSFET. The asymmetric double gate MOSFET among multi gate MOSFET developed to reduce the short channel effects has the advantage to increase the facts to be able to control the channel current, compared with symmetric double gate MOSFET. The increase of off current is, however, inescapable if aymmetric double gate MOSFET has the channel length of sub-10 nm. The influence of tunneling current was investigated in this study as the portion of tunneling current for off current was calculated. The tunneling current was obtained by the WKB(Wentzel-Kramers-Brillouin) approximation and analytical potential distribution derived from Poisson equation. As a results, the tunneling current was greatly influenced by bottom gate voltage in sub-10 nm asymmetric double gate MOSFET. Especially it showed the great deviation for channel length, top and bottom gate oxide thickness, and channel thickness.