• Title/Summary/Keyword: 플레쉬메모리

Search Result 5, Processing Time 0.024 seconds

Development of a Flash ADC with an Analog Memory (아날로그메모리를 이용한 플레쉬 ADC)

  • Chai, Yong-Yoong
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.6 no.4
    • /
    • pp.545-552
    • /
    • 2011
  • In this article, reference voltages in a general flash ADC are not obtained from a series of resistors but floating gates. When a behavior model simulation was performed in a pipelined ADC including the suggested flash ADC as a result of an ADC's overall function, it showed results that SNR is approximately 77 dB and resolution is 12 bit. And more than almost 90% showed INL within ${\pm}0.5$ LSB, and like INL, more than 90% showed DNL within ${\pm}0.5$ LSB.

Design of a Holter Monitoring System with Flash Memory Card (플레쉬 메모리 카드를 이용한 홀터 심전계의 설계)

  • 송근국;이경중
    • Journal of Biomedical Engineering Research
    • /
    • v.19 no.3
    • /
    • pp.251-260
    • /
    • 1998
  • The Holter monitoring system is a widely used noninvasive diagnostic tool for ambulatory patient who may be at risk from latent life-threatening cardiac abnormalities. In this paper, we design a high performance intelligent holter monitoring system which is characterized by the small-sized and the low-power consumption. The system hardware consists of one-chip microcontroller(68HC11E9), ECG preprocessing circuit, and flash memory card. ECG preprocessing circuit is made of ECG preamplifier with gain of 250, 500 and 1000, the bandpass filter with bandwidth of 0.05-100Hz, the auto-balancing circuit and the saturation-calibrating circuit to eliminate baseline wandering, ECG signal sampled at 240 samples/sec is converted to the digital signal. We use a linear recursive filter and preprocessing algorithm to detect the ECG parameters which are QRS complex, and Q-R-T points, ST-level, HR, QT interval. The long-term acquired ECG signals and diagnostic parameters are compressed by the MFan(Modified Fan) and the delta modulation method. To easily interface with the PC based analyzer program which is operated in DOS and Windows, the compressed data, that are compatible to FFS(flash file system) format, are stored at the flash memory card with SBF(symmetric block format).

  • PDF

Development of a ROM Writer for Shmoo Test of a Flash Memory Integrated into the MCU (MCU에 내장된 플레쉬 메모리 오동작 테스트 가능한 ROM Writer 개발)

  • Kim, Tae-Sun;Park, Cha-Hun
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.20 no.4
    • /
    • pp.103-109
    • /
    • 2015
  • This paper presents the development of a ROM writer for shmoo test of a flash memory integrated into the MCU(Micro Controller Unit). A shmoo test is a graphical display of the response of a component or system varying over a range of conditions and inputs. Often used to represent the results of the testing of complex electronic systems such as computers or integrated circuits such as DRAMs, ASICs or microprocessors. A shmoo test and data write time(32k) of the development ROM writer is 6.4 seconds, which was improved by about 20% compared to the rate of the currently used ROM writer.

Study of Data Retention Characteristics with surrounding cell's state in a MLC NAND Flash Memory (멀티 레벨 낸드 플레쉬 메모리에서 주변 셀 상태에 따른 데이터 유지 특성에 대한 연구)

  • Choi, Deuk-Sung;Choi, Sung-Un;Park, Sung-Kye
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.4
    • /
    • pp.239-245
    • /
    • 2013
  • The data retention characteristics depending on neighbor cell's threshold voltage (Vt) in a multilevel NAND flash memory is studied. It is found that a Vt shift (${\Delta}Vt$) of the noted cell during a thermal retention test is increased as the number of erase-state (lowest Vt state) cells surrounding the noted cell increases. It is because a charge loss from a floating gate is originated from not only intrinsic mechanism but also lateral electric field between the neighboring cells. From the electric field simulation, we can find that the electric field is increased and it results in the increased charge loss as the device is scaled down.

Variation of Threshold Voltage by Programming Voltage Change of a Flash Memory Device with Ge-MONOS (Ge-MONOS 구조를 가진 플레쉬 메모리 소자의 프로그래밍 전압에 따른 문턱 전압 관찰)

  • Oh, Jong Hyuck;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2019.05a
    • /
    • pp.323-324
    • /
    • 2019
  • For flash memory devices with Ge-MONOS(metal-Oxide-Nitride-Oxide-Silicon) structures, variations of threshold voltage with programming voltage were investigated. The programming voltage was observed in steps of 1V from 10V to 17V and programmed for 1 second. The threshold voltage from 10V to 14V was about 0.5V, which is not much different from that before programing, and the threshold voltages at 15V, 16V and 17V were 1.25V, 2.01V and 3.84V, respectively, which differed 0.75V, 1.49V and 3.44V from that before programing.

  • PDF