• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.879-882
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• 1999

The effects of the substrate bias on the performance of programming erasing in p-channel flash memory cell have been investigated. It is found that applying positive substrate bias can improve the programming and erasing speed. This improvements can be explained by Substrate Current Induced Hot Electron Injection. From the results, we can confirm that BTB programming method is better in programming and erasing speed than CHE programming method.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 2003.07a
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• pp.138-141
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• 2003

스마트카드와 같은 장치의 부채널 공격이 가능한 것으로 입증되면서 많은 연구가 진행되고 있다. 부채널 공격의 일종인 오류기반 공격은 구현 가능성이 논란의 대상이었지만 카메라 플래쉬를 이용한 광학적 공격이 보고되면서 실현 가능성이 높은 것으로 인식되고 있다. 본 논문에서는 AES에 대해 향상된 오류기반 공격을 제안한다. 제안된 방법을 사용하면 공격에 필요한 암호문 수를 기존 방법보다 많이 줄일 수 있으며 최적의 조건에서는 하나의 암호문만으로 키를 얻을 수 있다. 오류는 일시적으로 생긴 후 없어지는 유형을 사용할 수도 있고 영구적인 것일 수도 있다. 오류에 의한 변경 확률이 1이 아닌 경우와 오류 발생 시점의 오차에 대해서도 살펴본다.

• Proceedings of the Korean Information Science Society Conference
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• 2007.10a
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• pp.245-246
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• 2007

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.05a
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• pp.281-281
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• 2004

본 논문에서는 레이들(ladle)에 실린 용강의 균일한 혼합을 위해 사용되는 저취 시스템의 버블 강도를 예측하기 위해 진동센서를 이용한 안착대를 설계하고 제작하였다 또한 무선 인터넷을 이용해 안착대로부터 진동 데이터를 수신하여 실시간으로 원격지에 위치한 서버에 저장하는 시스템을 구현하였다. 이와 함께 저취 시스템에 사용되는 유량제어밸브를 컨트롤하기 위해 기존에 사용되는 프로토콜 변환기를 변경한 데이터 처리장치를 설계하고 제작하였다. 데이터처리장치는 4개의 직렬 신호를 동시에 처리 가능하며 비구조화된 데이터를 보관하다록 하기 위해 플래쉬 메모리를 장착하였으며, CPU의 데이터 처리를 위해 SRAM을 장착하도록 구성하였다.(중략)

• Proceedings of the Korean Information Science Society Conference
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• 2001.04a
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• pp.364-366
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• 2001

플래쉬 웹서버는 디스크 입출력 오버헤드를 줄이기 위해 웹 문서를 메인 메모리 캐슁하지만 동시에 들어오는 요청들에 대해 처리 순서는 고려하지 않는다. 웹서버에서 클라이어트가 요청하는 문서 정보를 미리 알 수 만 있다면, 동시에 들어오는 요청들의 가치에 따라 수행 순서를 바꿀 수 있다. 본 논문에서는 웹서버의 메인 메모리에 캐쉬 된 문서를 요구하는 요청들을 우선 수행시켜 디스크 입출력 오버해드를 줄이는 스케줄링을 수행함으로써 정적 웹 환경에서의 웹서버의 처리율을 향상시켰다.

• Proceedings of the KAIS Fall Conference
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• 2010.05a
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• pp.549-551
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• 2010

최근 환경보전의식의 변화에 따라 유아들의 환경보전에 대한 경각심이 고조되고 있음을 알 수 있다. 그러므로 본 논문에서는 유아들의 일상생활 속에서의 흙에 대한 내면화 과정을 단순 주입식 교육이 아닌 흙에 대한 지식을 이해하고 습득 및 필요성을 스스로 인식시킴으로써 아름다운 환경을 보전하려는 마음을 갖고 이를 실천할 수 있도록 하기 위해 2D 애니메이션 웹 컨텐츠를 설계하였다.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.3
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• pp.7-11
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• 2017

In this paper, we have studied the characteristics of NAND Flash memory in SONOS Poly-Si Thin Film Transistor (Poly-Si TFT) device. Source/drain junctions(S/D) of cells were not implanted and selective transistors were located in the end of cells. We found the optimum conditions of process by means of the estimation for the doping concentration of channel and source/drain of selective transistor. As the doping concentration was increased, the channel current was increased and the characteristic of erase was improved. It was believed that the improvement of erase characteristic was probably due to the higher channel potential induced by GIDL current at the abrupt junction. In the condition of process optimum, program windows of threshold voltages were about 2.5V after writing and erasing. In addition, it was obtained that the swing value of poly Si TFT and the reliability by bake were enhanced by increasing process temperature of tunnel oxide.

• Archives of design research
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• v.14 no.4
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• pp.217-226
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• 2001

In 21st century, with the rapid development of Information technologies, a new form of postgraduate courses on multimedia has emerged. The curriculum of that course is consisted of a combination of design related fields and computer science. In this thesis, I analyzed problems of design education come from multimedia departments of 2-year colleges. This form of departments result in the reduction of design related courses and that is also reduction of basic design rather than multimedia. But, for the desirable multimedia design education, the functional aspects of multimedia must be harmonized with the artistic aspects. For these reason, I developed a course of study on multimedia design. It consists of theoretical studies about design principles, actual training on flash application, and individual projects accomplishments. And on the basis of this results, case studies of 3 subjects were done in a semester.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.12B
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• pp.1418-1425
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• 2009

This paper proposes a novel FTL (Flash Translation Layer) algorithm based on sector-level mapping to reduce the number of total erase operations in flash memory accesses. The proposed algorithm can reduce the number of erase operations by utilizing the sector-level mapping table when writing data at flash memory. Sector-level mapping technique reduces flash memory access time and extendsthe life time of the flash memory. In the algorithm, wear-leveling is implemented by selecting victim blocks having the minimal number of erase operations, when empty spaces for write are not available. To evaluate the performance of the proposed FTL algorithm, experiments were performed on several applications, such as MP3 players, MPEG players, web browsers and document editors. The proposed algorithm reduces the number of erase operations by 72.4% and 61.9%, when compared with well-known BAST and FAST algorithms, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.16-23
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• 2010

This paper presents 6bit 250MS/s flash A/D converter which can be applied to wireless communication system. To solve the problem of large power consumption in flash A/D converter, control algorithm by input signal level is used in comparator stage. Also, input voltage range detector circuit is used in reference resistor array to minimize the dynamic power consumption in the comparator. Compared with the conventional A/D converter, the proposed A/D converter shows 4.3% increase of power consumption in analog and a seventh power consumption in digital, which leads to a half of power consumption in total. The A/D converter is implemented in a $0.18{\mu}m$ CMOS 1-poly 6-metal technology. The measured results show 106mW power dissipation with 1.8V supply voltage. It shows 4.1bit ENOB at sampling frequency 250MHz and 30.27MHz input frequency.