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Design of a 6bit 250MS/s CMOS A/D Converter using Input Voltage Range Detector  

Kim, Won (Dept. of Electronic Engineering, Inha University)
Seon, Jong-Kug (LS Industrial Systems)
Jung, Hak-Jin (Dept. of Electronic Engineering, Inha University)
Piao, Li-Min (Dept. of Electronic Engineering, Inha University)
Yoon, Kwang-Sub (Dept. of Electronic Engineering, Inha University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.47, no.5, 2010 , pp. 16-23 More about this Journal
Abstract
This paper presents 6bit 250MS/s flash A/D converter which can be applied to wireless communication system. To solve the problem of large power consumption in flash A/D converter, control algorithm by input signal level is used in comparator stage. Also, input voltage range detector circuit is used in reference resistor array to minimize the dynamic power consumption in the comparator. Compared with the conventional A/D converter, the proposed A/D converter shows 4.3% increase of power consumption in analog and a seventh power consumption in digital, which leads to a half of power consumption in total. The A/D converter is implemented in a $0.18{\mu}m$ CMOS 1-poly 6-metal technology. The measured results show 106mW power dissipation with 1.8V supply voltage. It shows 4.1bit ENOB at sampling frequency 250MHz and 30.27MHz input frequency.
Keywords
ADC(Analog-to-Digital Converter); flash; range detector;
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Times Cited By KSCI : 1  (Citation Analysis)
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