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Design of an Efficient FTL Algorithm for Flash Memory Accesses Using Sector-level Mapping  

Yoon, Tae-Hyun (서강대학교 전자공학과 CAD & ES 연구실)
Kim, Kwang-Soo (서강미래기술원)
Hwang, Sun-Young (서강대학교 전자공학과 CAD & ES 연구실)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.34, no.12B, 2009 , pp. 1418-1425 More about this Journal
Abstract
This paper proposes a novel FTL (Flash Translation Layer) algorithm based on sector-level mapping to reduce the number of total erase operations in flash memory accesses. The proposed algorithm can reduce the number of erase operations by utilizing the sector-level mapping table when writing data at flash memory. Sector-level mapping technique reduces flash memory access time and extendsthe life time of the flash memory. In the algorithm, wear-leveling is implemented by selecting victim blocks having the minimal number of erase operations, when empty spaces for write are not available. To evaluate the performance of the proposed FTL algorithm, experiments were performed on several applications, such as MP3 players, MPEG players, web browsers and document editors. The proposed algorithm reduces the number of erase operations by 72.4% and 61.9%, when compared with well-known BAST and FAST algorithms, respectively.
Keywords
Flash Memory; FTL; Sector-level Mapping; Embedded System; File System;
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