• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.4 s.310
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• pp.80-87
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• 2006

Recently, the distribution and using of the digital multimedia contents are easy by developing the internet application program and related technology. However, the digital signal is easily duplicated and the duplicates have the same quality compare with original digital signal. To solve this problem, there is the multimedia fingerprint which is studied for the protection of copyright. Fingerprinting scheme is a techniques which supports copyright protection to track redistributors of electronic inform on using cryptographic techniques. Only regular user can know the inserted fingerprint data in fingerprinting schemes differ from a symmetric/asymmetric scheme and the scheme guarantee an anonymous before recontributed data. In this paper, we present a new scheme which is the detection of colluded multimedia fingerprint by neural network. This proposed scheme is consists of the anti-collusion code generation and the neural network for the error correction. Anti-collusion code based on BIBD(Balanced Incomplete Block Design) was made 100% collusion code detection rate about the average linear collusion attack, and the hopfield neural network using (n,k)code designing for the error bits correction confirmed that can correct error within 2bits.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.9
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• pp.1847-1855
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• 2012

A 1V 1.6-GS/s 6-bit flash analog-to-digital converter (ADC) with a clock calibration circuit is proposed. A single track/hold circuit with a bootstrapped analog switch is used as an input stage with a supply voltage of 1V for the high speed operation. Two preamplifier-arrays and each comparator composed of two-stage are implemented for the reduction of analog noises and high speed operation. The clock calibration circuit in the proposed flash ADC improves the dynamic performance of the entire flash ADC by optimizing the duty cycle and phase of the clock. It adjusts the reset and evaluation time of the clock for the comparator by controlling the duty cycle of the clock. The proposed 1.6-GS/s 6-bit flash ADC is fabricated in a 1V 90nm 1-poly 9-metal CMOS process. The measured SNDR is 32.8 dB for a 800 MHz analog input signal. The measured DNL and INL are +0.38/-0.37 LSB, +0.64/-0.64 LSB, respectively. The power consumption and chip area are $800{\times}500{\mu}m2$ and 193.02mW.

• Journal of Korea Multimedia Society
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• v.15 no.11
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• pp.1305-1318
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• 2012

Image segmentation is one of the difficult research problems in machine vision and pattern recognition field. A commonly used segmentation method is the Otsu method. It is simpler and easier to implement but it fails if the histogram is unimodal or similar to unimodal. And if some target area is smaller than background object, then its histogram has the distribution close to unimodal. In this paper, we proposed an improved image segmentation method based on 1D Otsu method for a small target detection. To overcome drawbacks by unimodal histogram effect, we depressed the background histogram using a logarithm function. And to improve a signal to noise ratio, we used a local average value by the neighbor window for thresholding using 1D Otsu method. The experimental results show that our proposed algorithm performs better segmentation result than a traditional 1D Otsu method, and needs much less computational time than that of the 2D Otsu method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.4
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• pp.840-845
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• 2007

In a wireless sensor network, a middleware used to support efficient processing and fast delivering of sensing data should handle the data loss problem at an intermediate sensor node caused by unexpected sudden data burst. In his paper, it proposes a Delta-Average method for enhancing the efficiency of data aggregation and correctness where the sensed data should be delivered only with the limited computing power and energy resource. With the proposed method, unnecessary data transfer of the duplicate data is eliminated and data correctness is enhanced by using the proposed averaging and data differentiating scheme when an instantaneous data burst is occurred. Finally, with the TOSSTM simulation results on TinyDB, we verify that the correctness of the transferred data is enhanced.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.8 s.350
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• pp.19-26
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• 2006

In this paper, CMOS analog-to-digital converter (ADC) with a 6-bit 100MSPS at 1.8V is described. The architecture of the proposed ADC is based on a folding type ADC using resistive interpolation technique for low power consumption. Further, the number of folding blocks (NFB) is decreased by half of them compared to the conventional ones. A moebius-band averaging technique is adopted at the proposed ADC to improve performance. With the clock speed of 100MSPS, the ADC achieves an effective resolution bandwidth (ERBW) of 50MHz, while consuming only 4.5mW of power. The measured result of figure-of-merit (FoM) is 0.93pJ/convstep. The INL and DNL are within ${\pm}0.5 LSB$, respectively. The active chip occupies an area of $0.28mm^2$ in 0.18um CMOS technology.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.5 s.311
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• pp.68-75
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• 2006

Multimedia fingerprinting protects multimedia content from illegal redistribution by uniquely marking every copy of the content distributed to each user. Differ from a symmetric/asymmetric scheme, fingerprinting schemes, only regular user can know the inserted fingerprint data and the scheme guarantee an anonymous before recontributed data. In this paper, we present a scheme which is the algorithm using LDPC(Low Density Parity Check) for detection of colluded multimedia fingerprint and correcting errors. This proposed scheme is consists of the LDPC block, Hopfield Network and the algorithm of anti-collusion code generation. Anti-collusion code based on BIBD(Balanced Incomplete Block Design) was made 100% collusion code detection rate about the linear collusion attack(average, AND and OR) and LD% block for the error bits correction confirmed that can correct error until AWGN 0dB.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.3
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• pp.9-18
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• 2001

In this paper, we present the joint symbol detection and channel estimation for an orthogonal frequency division multiplexing (OFDM) system in fading channels. The proposed methods are based on decision-directed channel estimation (DDCE) method and their symbol detection is achieved by using Viterbi algorithm. This Viterbi decision-directed channel estimation (VDDCE) method tracks time-varying channels and detects a maximum likelihood symbol sequence. Recursive Viterbi decision-directed channel estimation (RVDDCE) method based on VDDCE method is proposed to shorten the detecting depth. In this method, channel estimate and Viterbi processing are recursively performed every interval of training symbol. Also, average chann'el estimation (ACE) technique to reduce the effect of additive white Gaussian noise (AWGN) is applied VDDCE method and RVDDCE method. These proposed methods arc demonstrated by computer simulation.

• Proceedings of the Korea Information Processing Society Conference
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• 2005.05a
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• pp.1623-1626
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• 2005

초음파 영상 기법은 장기, 연조직, 혈류를 검사하는데 쓰이는 영상 진단법이다. 초음파 장비를 통해 얻어진 초음파 볼륨 데이터는 장비 특성상 많은 잡음(speckle noise)을 포함하기 때문에, 깨끗한 영상을 얻기 위해서는 잡음 필터링(noise filtering)이 필요하다. 그런데, 볼륨 데이터 모든 영역에 대해 잡음 필터링을 적용할 경우 전처리 시간이 길어져 실시간으로 초음파 볼륨 데이터를 렌더링하기 어렵다. 본 논문에서는 실시간으로 입력되는 초음파 볼륨 데이터를 가시화 하기위하여 전처리 시간 없이 잡음을 제거하는 방법을 제안한다. 전처리 시간에 전체 볼륨 데이터에 대해 잡음 필터링을 적용하지 않고, 영상을 생성하는 동안 참조되는 복셀(voxel)에 대해서만 잡음 필터를 적용하여 얻은 값을 사용한다. 이때 필터링에 소요되는 시간을 최소화하기 위해 가장 단순한 평균화 필터를 사용한다. 그리고 복셀에 적용되는 3차원 필터를 3단계의 1차원 필터 연산 단계로 분할 한 후, 각 단계별 연산을 거친 복셀들에 대해서는 다시 연산을 하지 않도록 하여 중복을 피한다. 이를 통해 전처리 시간 없이 기존 방법과 동일한 화질을 유지하는 최종 영상을 만들어 낸다.

• 한국태양에너지학회:학술대회논문집
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• 2011.11a
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• pp.249-255
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• 2011

This paper is about the study of a stand-alone photovoltaic power conditioning system with an energy storage system with battery. The paper proposes the appropriate circuit model of stand-alone PV PCS considering the maintenance of the battery system. It also proposes the buck converter modeling by a state-space averaging method considering characteristics of solar cell. Lastly, it shows the way to choose the suitable battery and to design the model of bi-directional converter for charging and discharging battery. PSIM simulation is used to validate the proposed algothim of the system.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.5
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• pp.120-125
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• 2009

For effective noise removal prior to video processing, noise power or noise variance of an input video sequence needs to be found exactly, but it is actually a very difficult process. This paper presents an accurate noise variance estimation algorithm based on motion compensation between two adjacent noisy pictures. Firstly, motion estimation is performed for each block in a picture, and the residue variance of the best motion-compensated block is calculated. Then, a noise variance estimate of the picture is obtained by adaptively averaging and properly scaling the variances close to the best variance. The simulation results show that the proposed noise estimation algorithm is very accurate and stable irrespective of noise level.