• Journal of the Korean Institute of Telematics and Electronics
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• v.8 no.4
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• pp.7-16
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• 1971

A negative resistance element in the form of current control can be obtained by using a pair transistor circuit. This negative resistance element can be used in the generation of square pulse, and also in the realization of pulse width modulation circuit by superposing signal current on its bias current. The each bias current of pair circuit increases alternatively according to the polarity of the input signal. In order to satisfy this condition, a modified full wave rectification circuit has been adopted for supplying the input signal. Theoritical analysis of pulse times and design guidances for practical modulation circuit parameters are presented.

• Journal of IKEEE
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• v.23 no.2
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• pp.461-468
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• 2019

A continuous-time Delta-Sigma ADC has various benefits; it does not require an explicit anti-aliasing filter, and it is able to handle wider-band signals with less power consumption in comparison with a discrete-time Delta-Sigma ADC. However, it inherently needs to sample the signal with a high-speed clock, necessitating a complex decimation filter that operates at high speed in order to convert the modulator output to a low-rate high-resolution digital signals without causing aliasing. This paper proposes a continuous-time Delta-Sigma ADC architecture that employs pulse-width modulation and shows that the proposed architecture lends itself to a simpler implementation of the decimation filter using a lookup table.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.1
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• pp.94-102
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• 2003

This paper describes the load parallel type full-bridge high frequency resonant inverter can be used as power source. Output control method of proposed circuit is compared with pulse frequency modulation(PFM), pulse width modulation(PWM) and pulse phase variation(Phase-Shift). The analysis of the proposed circuit is generally described by using the normalized parameters. The principle of basic operating and the its characteristics are estimated according to the parameters such as switching frequency(${\mu}$), pulse width($\theta$d) the variation of phase angle($\phi$) by three driving signal patterns. Experimental results are presented to verify the theoretical analysis result. In future, Characteristics by three driving signal control method is provided as useful data in case of output control of a power supply in various fields as induction heating application, DC-DC converter etc.

• Korean Journal of Optics and Photonics
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• v.8 no.3
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• pp.250-253
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• 1997

The effect of dispersion in optical transmission system changes according to chirp and SPM. Chirp depends on the modulation condition of an external modulator. SPM is proportional to signal power. In this paper, we analyzed the pulse broadening due to SPM and chirp in the system with dispersion by using Split Step Fourier Method and calculated the optimum chirp parameter for 400 km transmission system. Experimental results are presented also.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.2
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• pp.253-258
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• 2012

A computationally efficient interpolation filter with a low-distortion performance is a key component to utilize the naturally-sampled pulse width modulation (NPWM) in a digital domain. To realize the efficient interpolation filter, we propose a novel design based on the recently-proposed modified Farrow filter. The proposed filter shows a better pass-band distortion performance maintaining similar degree of complexity compared with the conventional Lagrange interpolation filter. We achieve the maximum distortion deviation of 10-3 dB to 20-kHz audible frequency range and distortion reduction of 1/6 times compared with the Lagrange interpolation filter.

• Korean Journal of Optics and Photonics
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• v.10 no.2
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• pp.146-151
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• 1999

We demonstrated a harmonic mode locking scheme that used regeneratie phase modulation to get a high and stable repetition rate in a figure-of-eight fiber soliton laser. From the detected beat spectra of the laser output, a sinusoidal clock freguency tone of 400 MHz, the 96th harmonics of the fundamental mode locking frequency, was extracted with a high Q filter and was used to drive the phase modulator, resulting in stable output of soliton pulse train synchronized with the modulation signal. Generated soliton pulses had FWHM pulsewidth of 930 fs and 3.1 nm linewidth, yielding pulsewidth-bandwidth product of 0.359 that was close to the transform limit. As the modulation frequency always followed the beat frequency of laser modes, stable harmonic mode locking was achieved without the adjustment of the cavity length, which has been commonly required in actively mode-locked lasers.

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.194-195
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• 2016

본 논문에서는 고효율의 3상 3레그 3레벨 정류기의 하나인 비엔나 컨버터에서 단일 반송파 비교를 이용한 새로운 공간전압벡터 펄스폭변조(SVPWM) 방식의 구현에 대해서 제안을 한다. 기존 방식들은 2개의 반송파 비교를 주로 사용하고 있거나, 변조할 전압지령 신호의 절대값을 취하여 단일 반송파 비교를 사용하고 있으나, 제안하는 방식은 전압지령 신호의 변조구간에 따른 이동과 단일 반송파 비교를 이용을 해서 2개의 반송파 비교를 사용한 방식과 동일한 특성을 나타내면서 구현이 좀 더 용이한 장점을 갖는다. 제안하는 새로운 방식에 대한 이론적인 설명과 시뮬레이션 및 실험 결과들을 제시함을 통해 제안하는 본 방식의 타당함과 성능의 우수함을 나타내고자 한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.44-53
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• 2008

In this paper, we present the design of delta-sigma modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates PWM(pulse width modulation) signals using a single-bit fourth-order high-performance delta-sigma modulator. To achieve a high SNR(signal-to-noise ratio) and ensure system stability, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard $0.18{\mu}m$ CMOS process. The active area of the chip is $1.6mm^2$. It operates for the signal bandwidth from 20Hz to 20kHz. The measured THD+N(total harmonic distortion plus noise) at the $32{\Omega}$ load terminal is less than 0.03% from a 3V power supply.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.1
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• pp.9-15
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• 2015

A CMOS band-pass delta-sigma modulator(BPDSM) and cascode class-E power amplifier have been developed CMOS for Class-S power amplifier applications. The BPDSM is operating at 1-GHz sampling frequency, which converts a 250-MHz sinusoidal signal to a pulse-width modulated digital signal without the quantization noise. The BPDSM shows a 25-dB SQNR(Signal to Quantization Noise Ratio) and consumes a power of 24 mW at an 1.2-V supply voltage. The class-E power amplifier exhibits an 18.1 dBm of the maximum output power with a 25% drain efficiency at a 3.3-V supply voltage. The BPDSM and class-E PA were fabricated in the Dongbu's 110-nm CMOS process.

• Journal of the Korean Institute of Telematics and Electronics
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• v.9 no.3
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• pp.1-8
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• 1972

The characteristics of tunnel diode pair circuit biased within the negative resistance region has also the voltage-control type negative resistance region, and the voltage at the center point of negative resistance region is described as the square-wave relaxation oscillation. In this paper, the period T, positive duration T1, negative duration T2 of the pulse are obatined from the characteristic curve T, positive duration T1, negative duration T2 of the pulse are obtained from the characteristic curve and observed actually, considring the fact that the pulse width and the period of square-wave at the center point of the negative resistance region is able to be controlle dby the blas volgate. Mereover, the relationship between T, T1 or T2 and circuit parameters is searched for and the Circuit parameters that satisfy the conditions of T1-T2 being proportional to the variation of bias voltage with Teonstant are determined. Thereafter, the bias voltage and the signal voltage are inserted serially to the PWM circuit and the characteristics of that circuit is analyzed.