• Title/Summary/Keyword: 패스 스케줄

Search Result 25, Processing Time 0.024 seconds

A Scheduling algorithm for pipelined data path synthesis with variable initiation intervals under resource constraints (자원 제약하에서 가변 데이터 입력의 파이프라인 데이터 패스 함성을 위한 스케줄링 알고리즘)

  • 오주영;박도순
    • Proceedings of the Korean Information Science Society Conference
    • /
    • 2001.10c
    • /
    • pp.34-36
    • /
    • 2001
  • 상위 수준 합성 과정에서 스케줄링은 하드웨어 동작을 표현한 연산들이 주어진 제약 조건을 만족하며 최적의 제어단계에 배정되도록 하는 과정이며 스케줄 결과는 목적 하드웨어의 면적과 실행속도에 많은 영향을 준다. 파이프 라인은 순차적인 데이터 입력을 중첩 수행하여 실행 속도와 자원 이용률을 동시에 증가시키는 방법이다. 상위 수준에서 파이프라인 데이터 패스를 합성하기 위한 기존의 스케줄링 알고리즘들은 고정된 데이터 입력 간 격열을 기반으로 제안된 것이 대부분이며, 가변 데이터 입력 간격을 지원하는 스케줄링 알고리즘으로는 시간 제약 하의 자원최소화 알고리즘[5]이 제안되었다. 본 논문에서는 가변데이터 입력 간격을 지원하는 자원 제약하의 실행 시간 최소화 알고리즘을 제안한다. 이를 위해 연산의 스테이지 인덱스가 초기에 고정되는 시간제약하의 스케줄링 알고리즘[5]을 응용하여 자원제약하의 스케줄 진행과정에서 증가되는 제어단계에 따라 스테이지 인덱스가 변경 될 수 있도록 하고 점진적인 모빌리티 축소에 의해 스케줄한다. 제안된 스케줄링 알고리즘의 실험 결과는 다양한 자원제약과 입력 간격렬에 대하여 제약조건을 만족하는 효과적인 스케줄 결과를 유도한다.

  • PDF

Pass Schedule Design to Inhibit Surface Cracks Generation on Workpiece in Groove Rolling Process (공형압연 공정에서 소재 표면흠 발생억제를 위한 패스 스케줄 설계)

  • Na, Doo-Hyun;Lee, Young-Seog
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.34 no.10
    • /
    • pp.1443-1453
    • /
    • 2010
  • We simulated the roughing train of the rod mill of SEAH BESTEEL Inc. using finite element method to inhibit surface cracks initiation on workpiece. We designed 2nd pass (square roll) and applied to this roll in the roughing train of the rod mill. Also, we proposed new pass schedule, which changed roll gap of 3rd and 4th groove by using finite element method. We used shear damage model, which is dependent on shear stress ratio and compared the number of damaged elements on workpiece. A damaged element means surface crack. Consequently, after 2nd pass (square roll) is changed, the error rate decreased by 1.43% when compare to that of the old groove. And the number of damaged elements in the new pass schedule decreased by 37.6%, which is less than present pass schedule.

A Scheduling Approach using Gradual Mobility Reduction for Synthesizing Pipelined Datapaths (파이프라인 데이터패스 합성을 위한 점진적 배정가능범위 축소를 이용한 스케줄링 방법)

  • Yoo, Hee-Jin;Oh, Ju-Young;Lee, Jun-Yong;Park, Do-Soon
    • The KIPS Transactions:PartA
    • /
    • v.9A no.3
    • /
    • pp.379-386
    • /
    • 2002
  • This paper presents a scheduling approach for synthesizing pipelined datapaths under resource constraints. Our approach builds up a schedule based on gradual mobility reduction in contrast to other algorithms of previous researches, where an operation being scheduled is selected by using a priority function. The proposed method consists of a scheduling algorithm and a decision algorithm for detecting any violation against resource constraints. Our approach evaluates whether or not a scheduling solution can exist in case an operation temporarily is assigned to the earliest or latest control step among the assignable steps for the operation. If a solution cannot be found, it is impossible to assign the operation to that step due to a violation against resource constraints, and so we can eliminate that control step. This process is iterated until a reduction of mobility for all operations can not be obtained. Experiments on benchmarks show that this approach gains a considerable improvement over those by previous approaches.

Mobility Reduction Scheduling for High-Level Synthesis (상위수준합성을 위한 배정가능범위 축소 스케줄링)

  • Yoo, Hee-Jin;Yoo, Hee-Yong
    • Journal of KIISE:Computer Systems and Theory
    • /
    • v.32 no.7
    • /
    • pp.359-367
    • /
    • 2005
  • This paper presents a scheduling approach for synthesizing pipelined datapaths under resource constraints. The proposed approach evaluates whether or not a scheduling solution can exist in case an operation temporarily is assigned to the earliest or latest control step among the assignable steps for the operation. If a solution cannot be found, it is impossible to assign the operation to that control step due to a violation against resource constraints, and so we can eliminate that control step among candidate assignable control steps. The proposed algorithm builds up a schedule based on gradual mobility reduction and finds a solution that yields high performance by evaluating on the impact on register assignment. Experiments on benchmarks show that this approach gains a considerable improvement over previous approaches.

Pass Schedule Design for Improvement of Drawing Speed in the Dry Wire Drawing Process (신선 속도 향상을 위한 건식 신선 공정의 패스스케줄 설계)

  • 김영식;김동환;김병민;김민안;박용민
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2000.11a
    • /
    • pp.600-603
    • /
    • 2000
  • In the high carbon steel wire drawing process, the wire temperature increases as the drawing speed is faster in order to increase the production rate in the shop floor. The rapid temperature rise causes the wire fracture in the dry wire drawing process. So, in this paper, the isothermal pass schedule program, which includes the calculation method of wire temperature at each pass, is proposed to prevent the wire fracture due to the temperature rise. Using the isothermal pass schedule program, it is newly proposed the pass schedule design system that prevents the cup-cone defects, improves the elongation of the final products and assures further deformation. As a result, the temperature rise of the wire was decreased and the production rate of the final product is remarkably grown up according to the increase of the final drawing speed than that of the conventional process. Also, the proposed pass schedule design system could give a useful information to the process designer who would design the high carbon steel wire drawing process.

  • PDF

A Circuit Complexity Optimization ILP Algorithm of High-level Synthesis System for New Multiprocessor Design (새로운 멀티프로세서 디자인을 위한 상위수준합성 시스템의 회로 복잡도 최적화 ILP 알고리즘)

  • Chang, Jeong-Uk;Lin, Chi-Ho
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.16 no.3
    • /
    • pp.137-144
    • /
    • 2016
  • In this paper, we have proposed a circuit complexity optimization ILP algorithm of high-level synthesis system for new multiprocessor design. We have analyzed to the operator characteristics and structure of datapath in the most important high-level synthesis. We also introduced the concept of virtual operator for the scheduling of multi-cycle operations. Thus, we demonstrated the complexity to implement a multi-cycle operation of the operator, regardless of the type of operation that can be applied for commonly use in the ILP algorithm. We have achieved is that standard benchmark model for the scheduling of the 5th digital wave filter, it was exactly the same due to the existing datapath scheduling results.

An Efficient Packet Scheduling Scheme for Multi-path Communication (멀티패스 통신을 위한 효과적인 패킷 스케줄링 기법)

  • Kang, Hyeong-Kyu;Hong, Choong-Seon
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2011.04a
    • /
    • pp.597-600
    • /
    • 2011
  • 멀티패스 전송은 단대 노드간 다중 경로를 동시에 사용함으로써 효과적인 대용량 전송을 실현하는 미래 인터넷 설계의 한 부분이다. 이에 따라 draft-‘TCP Extensions for Multipath Operation with Multiple Addresses'에서 MPTCP 가 언급되었으며 기존 TCP 를 활용한 다중 전송에서 발생할 수 있는 다양한 오픈 이슈가 나오게 되었다. 본 논문에서는 위 논의로부터 나온 다양한 오픈 이슈 중 수신측에서 발생 할 수 있는 패킷의 재조합(packet reordering)을 줄이는데 초점을 둔다. 패킷의 재조합은 불필요한 에너지 소비와 빈번한 패킷 재전송(packet retransmission) 문제를 초래하며, 특히 에너지 효율이 중요한 모바일기기에 있어 반드시 해결되어야 문제라 할 수 있다. 이를 해결하기 위해 본 논문에서는 전송 경로들의 RTT 값을 비교하여 패킷의 스케줄링 하는 기법을 제안하였으며 시뮬레이션을 통해 성능을 검증하였다.

Analysis of wet Wire Drawing Process and Pass Redesign to Reduce Wire Breakage (습식 신선공정 해석 및 단선율 저감을 위한 패스 재설계)

  • 이상곤;김민안;김병민
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2002.05a
    • /
    • pp.1034-1037
    • /
    • 2002
  • Wet wire drawing process is used to produce fine wire in the industrial field. The production of fine eire by using wet wire drawing process with appropriate dies pass schedule would be impossible without understanding of relationship between process parameters such as material properties, dies reduction, friction conditions, drawing speed etc. However, up to new, dies pass schedule of wet wire drawing process has performed by trial and error of expert. Therefore, this study investigates the relationship between process parameters quantitatively and analyzes a conventional wet wire drawing process. Using the results, the conventional pass schedule can be redesigned to reduce the wire breakage during wet wire drawing. To verily the result of this study, the wet wire drawing experiment was performed. And the results between conventional process and redesigned pass schedule were compared. As the comparison of results, the wire breakage was considerably reduced in the redesigned pass schedule more than conventional pass schedule.

  • PDF

Bus and Registor Optimization in Datapath Synthesis (데이터패스 합성에서의 버스와 레지스터의 최적화 기법)

  • Sin, Gwan-Ho;Lee, Geun-Man
    • The Transactions of the Korea Information Processing Society
    • /
    • v.6 no.8
    • /
    • pp.2196-2203
    • /
    • 1999
  • This paper describes the bus scheduling problem and register optimization method in datapath synthesis. Scheduling is process of operation allocation to control steps in order to minimize the cost function under the given circumstances. For that purpose, we propose some formulations to minimize the cost function for bus assignment to get an optimal and minimal cost function in hardware allocations. Especially, bus and register minimization technique are fully considered which are the essential topics in hardware allocation. Register scheduling is done after the operation and bus scheduling. Experiments are done with the DFG model of fifth-order digital ware filter to show its effectiveness. Structural integer programming formulations are used to solve the scheduling problems in order to get the optimal scheduling results in the integer linear programming environment.

  • PDF