• Transactions of the KSME C: Technology and Education
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• v.3 no.1
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• pp.45-53
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• 2015

The fact that gas hydrate and/or paraffin wax is frequently plugged in offshore pipeline has been become very significant for offshore piepline flow assurance. An active electrical heating along pipeline has adapted in resolving flow assurance problem like as gas hydrate and wax plugging. This study represents a novel internal-swirled heater which was designed and fabricated for more effective heating and thermal mixing through pipeline. The internal-swirled heater suggested in this study shows higher thermal mixing performances than the conventional external-traced heater.

• Journal of the Korean Recycled Construction Resources Institute
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• v.11 no.4
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• pp.467-475
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• 2023

To ensure the safety of the pipeline against large deformation of the pipeline during lowering construction, the analysis for pipeline becomes emphasized. The FE analysis has a lower efficiency at calculating time, while it could be obtained high accuracy. In this paper, a reasonable analytical model for analysis of pipeline is proposed during lowering-in. This analytical model is partitioned considering the geometrical characteristics and modeled as two parameters Beam On Elastic Foundation and Euler-Bernoulli beam considering the boundary condition. This takes into account the pipeline-soil interaction and the axial forces acting on the pipeline. Previous model can only be applied to standardized conditions, whereas the proposed model defined as Segmented Pipeline Model can be considered for the majority of construction conditions occurred during lowering-in. In addition, minimized assumptions and segmented elements lead to improve the convenience and applicability of modeling. Nevertheless, the model shows accurate results compared to the FE model. Accordingly, it is expected that it will be used efficiently for configuration management as well as safety assessment of pipeline during lowering-in.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.6A
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• pp.1107-1116
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• 2001

고속 IP 주소 룩업(lookup)은 고속 인터넷 라우터의 성능을 좌우하는 주요 요소이다. LPM(longest prefix matching) 탐색은 IP 주소 룩업에서 가장 시간이 많이 걸리는 부분이다. PICAM은 고속 LPM 탐색을 위한 파이프라인 CAM 구조로서, 기존 CAM(content addressable memory, 내용 주수화 메모리)을 이용한 방법보다 룩업 테이블의 갱신속도가 빠르면서도 LPM 탐색율이 높은 CAM 구조이다. PICAM은 3단계의 파이프라인으로 구성된다. 단계 1 및 단계 2의 키필드분할수 및 매칭점의 분포에 따라 파이프라인의 성능이 좌우되며, LPM 탐색율이 달라질 수 있다. 본 논문에서는 PICAM의 파이프라인 성능모델을 제시하고, 이산사건 시뮬레이션(discrete event simulation)을 수행하여, 최적의 PICAM 구조를 도출하였다. IP version 4인 경우 키필드분할수를 8로 하고, 부하가 많이 걸리는 키필드블록을 중복 설치하는 것이 최적구조이며, IP version 6인 경우 키필드블록의 개수를 16으로 하는 것이 최적구조다.

• The Transactions of the Korea Information Processing Society
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• v.2 no.4
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• pp.466-476
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• 1995

This pater describes pipelining algorithm issues for a VLIW(Very Long Instruction Word) System and the effective pipelined processing method by occurrence in pipelined management of processor minimized to timing delay. The proposed algorithm is executed in pipeline and parallel processings, and by combining basic operations variable instruction set can be desinged for various applications. In this paper, we prove and analyze the efficiency of the proposed pipeline algorithm and compare with other processor pipeline algorithm in terms of time minimizing.

• Journal of the Korea Computer Graphics Society
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• v.12 no.3
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• pp.13-20
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• 2006

모바일 환경에서 고급 그래픽스 기술을 적용하고자 하는 시도로 최근 3D 그래픽 엔진을 탑재한 단말기가 출시되고 있다. 이 단말기는 OpenGL ES 1.x을 기준으로 고정된 파이프라인을 통해 그래픽 연산을 처리하고 있으므로 사용자가 다양한 그래픽 표현을 수행하는데 제약이 따른다. 최근 PC 환경의 그래픽 엔진에서는 고정 기능의 파이프라인이 아닌 프로그래밍 가능한 파이프라인을 제공하여 기존 고정 파이프라인에서 불가능했던 유연한 그래픽스 기술을 제공하고 있다. PC환경의 프로그래밍 가능한 파이프라인은 DirectX와 OpenGL 그래픽 라이브러리에 의해 제공되고 있지만, 모바일 환경에서는 이를 지원하기 위한 관련 제품이 아직 출시되지 않고 있는 상태이다. 본 논문에서는 2005년 9원에 발표된 프로그레밍 가능한 그래픽스 파이프라인에 대한 표준인 OpenGL ES 2.0에 기반한 효율적인 셰이더 구조와 이 의 구동방식을 제시한다. 본 연구는 PC상에서 소프트웨어로 개발되었고, 연구 결과는 그래픽스 하드웨어 설계를 위한 검증용으로 사용될 수 있을 뿐 아니라 응용 프로그래머의 모바일 콘텐츠 제작을 위하여 활용될 수 있다.

• The Magazine of the IEIE
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• v.23 no.11
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• pp.89-100
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• 1996

A new stage-sliced pipiline structure is presented to design a high speed real time Global Positional Systems(GPS) applications. The CORDIC algorothm was revised to generate a pipeline structure, which will be used to produce a large amount of trigonometric computations rapidly. A stage-sliced approach was introduced to adjust the number of interative processes, and thereby to control the precision of computation results. Both the computation and the control circuits of the proposed architecture are included in a pipeline stage, which are intergrated into a stage slice. The circuit was prototyped using six FPGA chips : one is used for glue logics and five of the chips are used for pipeline slice implementation. A single FPGA chip comprising 7 pipeline stages provides one pipeline slice. To compensate and inter-slice time delay, dummy cycles are introduced in inter-slice signal exchanges.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.5
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• pp.361-368
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• 2003

A new high-speed direct digital frequency synthesizer using a low power pipelined parallel accumulator is proposed. The proposed pipelined parallel accumulator uses both pipelining and paralleling techniques to increase speed and to reduce power consumption. The 2-pipelined 2-parallel accumulator only consumes 66% and 69% power of the 4-pipelined accumulator and the 4-parallel accumulator respectively with the same throughput. The proposed accumulator can achieve higher throughput with smaller area and less power consumption in lower clock frequency. All circuit simulations and implementations are based on a 0.35um CMOS process with VCC = 3.3V.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.712-713
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• 2011

In this paper, the AMBA AXI slave unit that can verify the pipelined arithmetic unit is proposed and the 2-stage 16-bit pipelined multiplier is introduced as design example. The proposed AXI slave unit consists of input buffer block memory, control registers, pipelined arithmetic unit, control unit, output buffer block memory, and AXI slave interface unit. The main operational procedures are divided into the following steps, such as burst-mode input data loading for the input buffer memory, programming of control registers, arithmetic operations for block data in the input buffer memory, and burst-mode output data unloading from output buffer memory to host processor. Because the proposed AXI slave unit is general structure, it can be efficiently applicable to AMBA AXI and AHB slave unit with pipelined arithmetic unit.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.36-42
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• 2009

This paper proposes the high-performance pipeline architecture for modified Booth multipliers. The proposed multiplier circuits are based on modified Booth algorithm and pipeline architecture which are the most widely used techniques to accelerate the multiplication speed. In order to implement the optimally pipelined multipliers, many kinds of experiments have been conducted. The experimental results show that the speed improvement gain exceeds the area penalty and this trend is manifested as the number of pipeline stages increases. It is also important to insert the pipeline registers at the proper positions. We described the proposed modified Booth multiplier circuits in Verilog HDL and synthesized the gate-level circuits using 0.13um standard cell library. The resultant multiplier circuits show better performance than others. Since they operate at GHz ranges, they can be used in the application systems requiring extremely high performance such as optical communication systems.

• Proceedings of the Korea Contents Association Conference
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• 2008.05a
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• pp.198-202
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• 2008

Manufacturing process of large-scale 3D computer animation is becoming sophistication, ramification because of development of manufacturing technique and extravagant budget. Form of manufacturing pipeline has been variously changed to production type, manufacturing scale, manufacturing form. But it is time that renewed discussion is needed because change and development for the organization is insufficient in small manufacturing company. The project aims to try to help understanding for manufacturing pipeline of internal small-scale 3D animation and to find a plan of organization for internal small-scale production of the real situation. Organization model and methodology of manufacturing pipeline of small manufacturing company is not absolute because it is enough possible to be changed to inclination of the project and its environment. People must fully understand the purpose for organization of manufacturing pipeline of 3D computer animation and it must be organized to the situation for small-scale production so that every worker in production can share the information perfectly.